• KSII Transactions on Internet and Information Systems (TIIS)
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• 제5권7호
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• pp.1274-1292
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• 2011

Due to the variety of household electric devices and different power consumption habits of consumers at present, general home energy management (HEM) systems suffer from the lack of dynamic identification of various household appliances and a unidirectional information display. This study presented a set of intelligent interconnection network systems for electric appliances, which can measure the power consumption of household appliances through a current sensing device based on OSGi platform. The system establishes the characteristics and categories of related electric appliances, and searches the corresponding cluster data and eliminates noise for recognition functionality and error detection mechanism of electric appliances by applying the clustering algorithm. The system also integrates household appliance control network services so as to control them according to users' power consumption plans or through mobile devices, thus realizing a bidirectional monitoring service. When the system detects an abnormal operating state, it can automatically shut off electric appliances to avoid accidents. In practical tests, the system reached a recognition rate of 95%, and could successfully control general household appliances through the ZigBee network.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2001년도 하계학술대회 논문집 A
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• pp.544-546
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• 2001

This paper presents the results of power flow of North-South Korea system with interconnected cases which were proposed by various present studies. PSS/E and PowerWorld Simulator were used to analyze the inter connected system with several interconnected lines alternatives. The results would be very useful to select the best alternative for interconnection with considering several evaluation terms.

• Journal of Power Electronics
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• 제19권6호
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• pp.1527-1535
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• 2019

Because of the shortcomings of the PID controllers and traditional drive systems of permanent magnet synchronous motors (PMSMs), a PMSM passivity-based control (PBC) drive system based on a quasi-Z source matrix converter (QZMC) is proposed in this paper. The traditional matrix converter is a buck converter with a maximum voltage transmission ratio of only 0.866, which limits the performance of the driven motor. Therefore, in this paper a quasi-Z source circuit is added to the input side of the two-stage matrix converter (TSMC) and its working principle has also been verified. In addition, the controller of the speed loop and current loop in the conventional vector control of a PMSM is a PID controller. The PID controller has the problem since its parameters are difficult to adjust and its anti-interference capability is limited. As a result, a port controlled dissipative Hamiltonian model (PCHD) of a PMSM is established. Thereafter a passivity-based controller based on the interconnection and damping assignment (IDA) of a QZMC-PMSM is designed, and the stability of the equilibrium point is theoretically verified. Simulation and experimental results show that the designed PBC control system of a PMSM based on a QZMC can make the PMSM run stably at the rated speed. In addition, the system has strong robustness, as well as good dynamic and static performances.

• 전기학회논문지
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• 제67권11호
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• pp.1408-1414
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• 2018

Recently, as a solution to the problem of maintaining system reliability, stability, and quality occurring worldwide, such as activation of smart grid and recognition of super grid and rapid grid interconnection of renewable energy sources HVDC(High Voltage Direct Current) will appear on the front of the electric power system. These concepts are also very important concepts in HVDC systems. When the HVDC system is linked to the existing power system, it is composed of AC/DC/AC conversion device, and these conversion devices are composed of many thyristors. These parts(Devices) are connected in a complicated manner, and they belong to the one with a higher failure rate. However, the problem of establishing the concept of failure rate of HVDC parts directly linked to economic efficiency and the understanding accompanying it are still insufficient. Therefore, in this paper, we establish the meaning of reliability in power system and try to develop a model to analyze and verify the failure rate data of HVDC based on this.

• KIEE International Transactions on Power Engineering
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• 제5A권1호
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• pp.31-39
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• 2005

This paper illustrates a tie line constrained equivalent assisting generator (TEAG) model considering forced outage rates of transmission systems for reliability evaluation of interconnected power systems. Interconnections between power systems can provide improved levels of reliability. It is expected that the TEAG model developed in this paper will prove useful in the solution to problems related to the effect of transmission system uncertainties in the reliability evaluation of interconnected power systems. It is important that interconnection between power systems can provide the improved levels of reliability. Therefore, It is expected that the TEAG model developed in this study will provide some solution among many problems for interconnected power systems as an optimal tie line capacity and a connected point between assisting systems and assisted system. The characteristics and validity of this developed TEAG considering transmission systems are introduced by case study of three IEEE MRTS interconnected.

• 대한전자공학회논문지SD
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• 제37권2호
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• pp.38-45
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• 2000

광연결 시스템의 SPICE 모델링과 이를 이용한 시스템 성능 분석에 관한 연구를 수행하였다. 먼저, 광소자의 등가회로 모델을 구현하고, 송·수신단의 회로를 설계하여 안정적인 SPICE 시뮬레이션 결과를 얻었다. SPICE 시뮬레이션 결과로 eye 다이어그램을 얻을 수 있고, 이를 토대로 BER을 계산할 수 있었다. 바이어스 조건에 따라서 turn-on 지연으로 인한 jitter 현상을 볼 수 있고, 전송율, BER, 송신단의 전력 소모, 바이어스 조건의 상호 관계를 통해 시스템의 최적화를 이룰 수 있다. 광연결 시스템의 SPICE를 이용한 최적화 방법은 Gigabit Ethernet, ATM등의 응용 분야에서 LD 구동회로와 수신단의 회로 설계에 유용하게 쓰일 것으로 기대된다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2004년도 하계학술대회 논문집 A
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• pp.120-122
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• 2004

This paper analyse impacts of Community Energy System (CES) on the grid during transition periods for integrating of the CES and the grid. In the near future, CES might be one of major energy supply structures. The basic concept of CES is that it supplies electrical and thermal energy to the local customer loads through the islanded power network separated from the grid. Therefore, the interconnection with the grid occurs only when the energy supply from the CES generators does not meet the demand of the local load. For avoiding impacting the grid during the transition operation modes of CES, it is necessary to thoroughly analyse the influences on the grid during those periods. In order to show them, in this paper, we model the CES with 2.34 WVA DG and simulate the impacts on the grid due to interconnection of CES The simulation results show that, in order to reduce bad influences of CES on the grid, CES need the efficient load management and generation control schemes during the transition periods.

• 마이크로전자및패키징학회지
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• 제21권3호
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• pp.1-6
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• 2014

차세대 전자소자는 입출력(I/O) 핀 수의 증가, 전력소모의 감소, 소형화 등으로 인해 fine-pitch 배선 시스템이 요구되고 있다. Fine-pitch 특히 10 um 이하의 fine-pitch에서는 기존의 무연솔더나 Cu pillar/solder cap 구조를 사용할 수 없기 때문에 Cu-to-Cu bumpless 배선 시스템은 2D/3D 소자 구조에서 매우 필요한 기술이라 하겠다. Bumpless 배선 기술로는 BBUL 기술, 접착제를 이용한 WOW의 본딩 기술, SAB 기술, SAM 기술, 그리고 Cu-to-Cu 열압착 본딩 기술 등이 연구되고 있다. Fine-pitch Cu-to-Cu interconnect 기술은 연결 방법에 상관없이 Cu 층의 불순물을 제거하는 표면 처리 공정, 표면 활성화, 표면 평탄도 및 거칠기가 매우 중요한 요소라 하겠다.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2001년도 하계종합학술대회 논문집(1)
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• pp.155-158
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• 2001

A 640Gb/s high-speed ATM switching system that is based on the technologies of advanced MCM, 0.25um CMOS and optical WDM interconnection is fabricated for future N-ISDN services. A 40 layer, 160mm$\times$114mm ceramic MCM realizes the basic ATM switch module with 80Gbps throughput. The basic unit ATM switch module with 80Gb/s throughput. The basic unit ATM switch MCM consists of in 8 chip advanced 0.25um CMOS VLSI and 32 chip I/O Bipolar VLSIs. The MCM employs an 40 layer, very thin layer ceramic MCM and a uniquely structured closed loop type liquid colling system is adopted to cope with the MCM's high-power dissipation of 230w. The MCM is Mounted on a 32cm$\times$50cm mother board. A three stage ATM switch is realized by optical WDM interconnection between the high-performance MCM.

• 전자공학회논문지SC
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• 제37권6호
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• pp.25-34
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• 2000

본 논문에서 범용의 CMOS 트랜지스터 공정을 사용하여 250-Mbps 10-채널 CMOS 광 수신기 어레이칩을 설계하였다. 이러한 광 수신기 어레이는 병렬 광 신호 전송 시스템의 성능을 결정하는 가장 중요한 블록이며 이를 CMOS 트랜지스터로 설계함으로써 낮은 단가의 시스템의 구현을 가능하게 하였다. 각 데이터 채널은 집적화 된 광 검출 소자 및 여러 단의 증폭기로 구성된 아날로그 프런트-엔드, D-FF (D-flip flop)과 칩 외부 구동기로 구성된 디지털 블록으로 구성되어 있다. 전체 칩은 광 수신기 어레이와 데이터의 동기식 복원을 위해 PLL (Phase-Lock Loop) 회로로 구성 되어있다. 설계한 광 수신기 어레이 칩은 0.65-㎛ 2-poly, 2-metal CMOS 공정을 사용하여 제작하였으며, 각 채널은 ±2.5V의 전원 전압에 대하여 330㎽의 소비 전력을 보였다.