• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.11a
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• pp.55-55
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• 2009

Silicon Carbide (SiC) is a material with a wide bandgap (3.26eV), a high critical electric field (~2.3MV/cm), a and a high bulk electron mobility (${\sim}900cm^2/Vs$). These electronic properties allow high breakdown voltage, high frequency, and high temperature operation compared to Silicon devices. Although various SiC DMOSFET structures have been reported so far for optimizing performances. the effect of channel dimension on the switching performance of SiC DMOSFETs has not been extensively examined. In this paper, we report the effect of the interface states ($Q_s$) on the transient characteristics of SiC DMOSFETs. The key design parameters for SiC DMOSFETs have been optimized and a physics-based two-dimensional (2-D) mixed device and circuit simulator by Silvaco Inc. has been used to understand the relationship with the switching characteristics. To investigate transient characteristic of the device, mixed-mode simulation has been performed, where the solution of the basic transport equations for the 2-D device structures is directly embedded into the solution procedure for the circuit equations. The result is a low-loss transient characteristic at low $Q_s$. Based on the simulation results, the DMOSFETs exhibit the turn-on time of 10ns at short channel and 9ns at without the interface charges. By reducing $SiO_2/SiC$ interface charge, power losses and switching time also decreases, primarily due to the lowered channel mobilities. As high density interface states can result in increased carrier trapping, or recombination centers or scattering sites. Therefore, the quality of $SiO_2/SiC$ interfaces is important for both static and transient properties of SiC MOSFET devices.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.5 s.335
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• pp.31-38
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• 2005

The architecture and the implementation details of a UTMI(USB2.0 Transceiver Macrocell Interface) compatible USB2.0 transceiver chip were presented. To confirm the validation of the incoming data in noisy channel environment, a squelch state detector and a current mode Schmitt-trigger circuit were proposed. A current mode output driver to transmit 480Mbps data on the USB cable was designed and an on-die termination(ODT) which is controlled by a replica bias circuit was presented. In the USB system using plesiochronous clocking, to compensate for the frequency difference between a transmitter and a receiver, a synchronizer using clock data recovery circuit and FIFO was designed. The USB cable was modeled as the lossy transmission line model(W model) for circuit simulation by using a network analyzer measurements. The USB2.0 PHY chip was implemented by using 0.25um CMOS process and test results were presented. The core area excluding the IO pads was $0.91{\times}1.82mm^2$. The power consumptions at the supply voltage of 2.5V were 245mW and 150mW for high-speed and full-speed operations, respectively.

• Journal of the Institute of Electronics and Information Engineers
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• v.52 no.2
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• pp.89-96
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• 2015

This paper presents a high efficiency, PSM/DCM/CCM triple mode boost DC-DC converter for mobile application. This device operates at Pulse-Skipping Mode(PSM) when it enters light load, and otherwise operate the operating frequency of 1.4MHz with Pulse-Width Modulation(PWM) mode. Especially in order to improve the efficiency during the Discontinuous-Conduction Mode(DCM) operation period, the reverse current prevention circuit and oscillations caused by the inductor and the parasitic capacitor to prevent the Ringing killer circuit is added. The input voltage of the boost converter ranges from 2.5V ~ 4.2V and it generates the output of 4.8V. The measurement results show that the boost converter provides a peak efficiency of 92% on CCM and 87% on DCM. And an efficiency-improving PWM operation raises the efficiency drop because of transition from PWM to PFM. The converter has been fabricated with a 0.18um Dongbu BCDMOS technology.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.37 no.2
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• pp.5-12
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• 2000

Uncooled metallic thin-film thermopile infrared detectors have been fabricated, and the figures of merit for the detectors were examined. The hot junctions of a thermopile were prepared on a $Si_{3}N_{4}/SiO_{2}/Si_{3}N_{4}$-membrane which acts as a thermal isolation layer, the cold junctions on the membrane supported with the silicon rim which functions as a heat sink, and Au-black was used as an infrared absorber. Infrared absorbance of Au-black, which strongly depends on the chamber pressure during Au-evaporation and its mass per area, was found to be about 90 ％ in the wavelength range from 3${\mu}{\textrm}{m}$ to 14${\mu}{\textrm}{m}$. Voltage responsivity, noise equivalent power, and specific detectivity of Bi-Sb thermopile infrared detector at 5 Hz-chopping frequency were about 10.5V/W, 2.3 nW/Hz$^{1/2}$, 및 $1.9\times10^{7}$ cm.Hz$^{1/2}$/w at room temperature in air, respectively.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.10
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• pp.80-86
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• 2014

A low-noise readout circuit is studied for 2-D capacitive microbolometer focal plane arrays (FPAs). In spite of the merits of the integration method, a simple and effective pixelwise readout circuit without integration is used for input circuit because of a small pixel size and narrow noise bandwidth. To reduce the power consumption and the kT/C noise, which is the dominant noise of the capacitive microbolometer FPAs with small capacitance, a new correlated double sampling (CDS) is used for columnwise circuit. The proposed circuit has been designed using a $0.35-{\mu}m$ 2-poly 4-metal CMOS process for a microbolometer array with a pixel size of $50{\mu}m{\times}50{\mu}m$. The proposed circuit effectively reduces the kT/C noise and the other low-frequency noise of microbolometer, and the noise characteristics of the fabricated chip have been verified by measurements. The rms noise voltage of the proposed circuit is reduced from 30 % to 55 % compared to that of the simple readout input circuit, and the noise equivalent temperature difference (NETD) of the proposed circuit is very low value of 21.5 mK.

• Journal of Biosystems Engineering
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• v.25 no.2
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• pp.97-106
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• 2000

To develop the grain moisture meter using microwave free space transmission technique, a 10.5GHz microwave signal with the power of 11mW generated by an oscillar with a dielectric resonator is transmitted to an isolator and radiated from a transmitting $2{\times}2$ microstrip patch array antenna into the sample holder filled with the 12 to 26%w.b. of Korean Hwawung paddy rice. the microwave signal, attenuated through the grain with moisture, is collected by a receiving $2{\times}2$ microstrip patch array antenna and detected using a Shottky diode with excellent high frequency characteristic. A pair of light and simple microstrip patch array antenna for measurement of grain moisture content is designed and implemented on atenflon substrate with trleative dielectric constant of 2.6 and thickness of 0.54 by using Ensemble ver. 4.02 software. The aperture of microstrip patch arrays is 41 mm width and 24mm high. The characteristics of microstrip patch antenna such as grain. return loss, and bandwidth are 11.35dBi, -38dB and 0.35GHz($50^{\circ}$ at far-field pattern of E and H plane. The width of the sample holder is large enough to cover the signal between the antennas temperature and bulk density respectively. The calibration model for measurement of grain moisture content is proposed to reduce the effects of fluectuations in bulk density and temperature which give serious errors for the measurements . From the results of regression analysis using the statistically analysis method, the moisture content of grain samples (MC(%)) is expressed in terms of the output voltage(v), temperature (t), and bulk density of samples(${\rho}b$)as follows ;$$MC(%)\;=\;(-3.9838{\times}10^{-8}{\times}v^{3}+8.023{\times}10^{-6}{\times}v^{2}-0.0011{\times}v-0.0004{\times}t+0.1706){\frac{1}{{\rho}b}}{\times}100$ Its determination coefficient, standard error of prediction(SEP) and bias were found to be 0.9855, 0.479%w.b. and -0.0.369 %w.b. respectively between measured and predicted moisture contents of the grain samples.

• Journal of the Korean Vacuum Society
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• v.14 no.4
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• pp.207-214
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• 2005

This paper presents a channel structure for promising high performance pseudomorphic high electron mobility transistor(pHEMT) switching device for design and fabricating of microwave control circuits, such as switches, phase shifters, attenuators, limiters, for application in personal mobile communication systems. Using the designed epitaxial channel layer structure and ETRI's $0.5\mu$m pHEMT switch process, single pole double throw (SPDT) Tx/Rx monolithic microwave integrated circuit (MMIC) switch was fabricated for 2.4 GHz and 5 GHz band wireless local area network (WLAN) systems. The SPDT switch exhibits a low insertion loss of 0.849 dB, high isolation of 32.638 dB, return loss of 11.006 dB, power transfer capability of 25dBm, and 3rd order intercept point of 42dBm at frequency of 5.8GHz and control voltage of 0/-3V These performances are enough for an application to 5 GHz band WLAN systems.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.7
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• pp.122-130
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• 2013

This work proposes a 12b 100MS/s 45nm CMOS four-step pipeline ADC for high-speed digital communication systems requiring high resolution, low power, and small size. The input SHA employs a gate-bootstrapping circuit to sample wide-band input signals with an accuracy of 12 bits or more. The input SHA and MDACs adopt two-stage op-amps with a gain-boosting technique to achieve the required DC gain and high signal swing range. In addition, cascode and Miller frequency-compensation techniques are selectively used for wide bandwidth and stable signal settling. The cascode current mirror minimizes current mismatch by channel length modulation and supply variation. The finger width of current mirrors and amplifiers is laid out in the same size to reduce device mismatch. The proposed supply- and temperature-insensitive current and voltage references are implemented on chip with optional off-chip reference voltages for various system applications. The prototype ADC in a 45nm CMOS demonstrates the measured DNL and INL within 0.88LSB and 1.46LSB, respectively. The ADC shows a maximum SNDR of 61.0dB and a maximum SFDR of 74.9dB at 100MS/s, respectively. The ADC with an active die area of $0.43mm^2$ consumes 29.8mW at 100MS/s and a 1.1V supply.

• Journal of the Korean Vacuum Society
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• v.19 no.1
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• pp.36-44
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• 2010

The ambipolar diffusion equation has been solved in a fine-tube lamp of a few mm in diameter. In the diffusion of radial direction, the plasma diffuses and vanishes away at the glass wall by recombination with the characteristic time of plasma loss is given by $\tau_r\;=\;(r_0/2.4)^2/D_a$. With the radius $r_0{\sim}1\;mm$ and the ambipolar diffusion coefficient $D_a{\sim}0.01\;m^2/s$, the vanishing time is calculated $\tau_r{\sim}10\;{\mu}s$ which corresponds to the least value of frequency 30 kHz for the sustaining the plasma in the operation of high voltage AC-power. In the diffusion of longitudinal z-direction, a high density plasma generated at the area of a high voltage electrode, diffuses into the positive column with the characteristic time $\tau_z{\sim}0.1\;s$. The plasma diffusion velocity at the boundary of high density plasma is $u_D{\sim}10^2\;m/s$ at the time $t{\sim}10^{-6}$ s and the diffusion velocity becomes slow as $u_D{\sim}1\;m/s$ at $t{\sim}10^{-3}\;s$. Therefore, for the long lamp of 1 m, it takes about several seconds for the high density plasma at the area of electrode to diffuse through the whole positive column space.

• Journal of the Korean Society for Nondestructive Testing
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• v.26 no.4
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• pp.211-219
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• 2006

The UET(ultrasound excited thermography) for the ,eat-time diagnostics of the object employs an infrared camera to image defects of the surface and subsurface which are locally heated using high-frequency putted ultrasonic excitation. The dissipation of high-power ultrasonic energy around the feces of the defects causes an increase In temperature. The defect's image appears as a hot spot (bright IR source) within a dark background field. The UET for nondestructive diagnostic and evaluation is based on the image analysis of the hot spot as a local response to ultrasonic excited heat deposition. In this paper the applicability of VET for fast imaging of defect is described. The ultrasonic energy is injected into the sample through a transducer in the vertical and horizontal directions respectively. The voltage applied to the transducer is measured by digital oscilloscope, and the waveform are compared. Measurements were performed on four kinds of materials: SUS fatigue crack specimen(thickness 14mm), PCB plate(1.8 mm), CFRP plate(3 mm) and Inconel 600 plate (1 mm). A high power ultrasonic energy with pulse durations of 250ms Is injected into the samples in the horizontal and vertical directions respectively The obtained experimental result reveals that the dissipation loss of the ultrasonic energy In the vertical injection is less than that in the horizontal direction. In the cafe or PCB, CFRP, the size of hot spot in the vortical injection if larger than that in horizontal direction. Duration time of the hot spot in the vertical direction is three times as long as that in the horizontal direction. In the case of Inconel 600 plate and SUS sample, the hot spot in the horizontal injection was detected faster than that in the vertical direction