• Title/Summary/Keyword: Power MOSFET

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Development of LDC for Electric Vehicle using SiC MOSFET (SiC MOSFET을 적용한 전기자동차용 LDC 개발)

  • Noh, Yong-Su;Joo, Dongmyoung;Hyon, Byong Jo;Kim, Jin-Hong;Choi, Jun-Hyuk
    • Proceedings of the KIPE Conference
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    • 2019.07a
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    • pp.273-274
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    • 2019
  • 본 논문에서는 SiC MOSFET를 적용한 전기자동차용 LDC의 개발에 대해 다룬다. SiC MOSFET는 기존 Si 계열의 전력 반도체 소자에 비해 고주파 동작이 용이하며 스위칭 손실이 낮아 고효율, 고전력밀도 설계가 가능하다는 장점을 갖는다. 본 논문에서는 SiC MOSFET를 이용한 LDC의 설계에 대해 서술하고, 이를 시뮬레이션 및 실험을 통해 검증하였다.

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Dielectric Barrier Discharge for Ultraviolet Light Generation and Its Efficient Driving Inverter Circuit

  • Oleg, Kudryavtsev;Ahmed, Tarek;Nakaoka, Mutsuo
    • KIEE International Transactions on Electrophysics and Applications
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    • v.4C no.3
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    • pp.101-105
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    • 2004
  • The efficient power MOSFET inverter applied for a simple and low cost power supply is proposed for driving the dielectric barrier discharge (DBD) lamp load. For decades, the DBD phenomenon has been used for ozone gas production in industry. In this research, the ultraviolet and visible light sources utilizing the DBD lamp is considered as the load for solid-state high frequency power supply. It is found that the simple voltage-source single-ended quasi-resonant ZVS inverter with only one active power switch could effectively drive this load with the output power up to 700 W. The pulse density modulation based control scheme for the single-ended quasi-resonant ZVS inverter using a low voltage and high current power MOSFET switching device is proposed to provide a linear power regulation characteristic in the wide range 0-100% of the full power as compared with the conventional control based Royer type parallel resonant inverter type power supplies.

Design of the Electronic Condenser-Controller Using Linear Regions of MOSFET (스위칭소자(MOSFET)의 선형영역을 이용한 전자조상기 개발)

  • Park, In-Sun;Lee, Hwa-Chun;Park, Sung-Jun;Jeong, Heon
    • Proceedings of the KIPE Conference
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    • 2011.07a
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    • pp.50-51
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    • 2011
  • 본 논문에서는 영구자석 동기발전기(PMSG)의 전압 및 역률 보상을 위한 기계식 접점을 가지는 조상기의 문제점을 개선하기 위해 전자회로 방식을 채택하여 제어회로에 마이크로프로세서를 사용, 회로를 최소화하고 접점 부분은 전자적인 스위칭소자(MOSFET)를 사용함으로써 조상기의 신뢰성과 특성을 개선할 수 있는 시스템을 제안하고 시뮬레이션을 통해 그 타당성을 검증한다.

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Reduced Cell Pitch of Vertical Power MOSFET By Forming Source on the Trench Sidewall (트렌치 측벽에 소오스를 형성하여 셀 피치를 줄인 수직형 전력 모오스 트렌지스터)

  • Park, Il-Yong
    • Proceedings of the KIEE Conference
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    • 2003.07c
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    • pp.1550-1552
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    • 2003
  • 고밀도의 트렌치 전력 MOSFET를 제작하는 데 있어서 새로운 소자의 구조와 공정을 제시하고 이차원 소자 및 공정 시뮬레이터를 이용하여 검증했다. 트렌치 게이트 MOSFET의 온-저항을 낮추기 위해 셀 피치가 서브-마이크론으로 발전할 경우 문제가 되는 소오스 영역을 확보하고자 p-base의 음 접촉을 위한 P+ 영역과 N+ 소오스 등이 트렌치의 측벽에 형성되고, 트렌치 게이트는 그 아래에 매몰된 구조를 제안했다. 시뮬레이션 결과는 항복전압이 45 V이고, 온-저항이 12.9m${\Omega}{\cdot}mm^2$로 향상된 trade-off 특성을 보였다.

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High efficiency current measurement using resistor and bypass switch (바이패스 스위치와 저항을 이용한 고효율 전류측정 방법)

  • Lee, Hwa-Seok;Thayalan, I. Daniel Thena;Park, Joung-Hu
    • Proceedings of the KIPE Conference
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    • 2012.07a
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    • pp.103-104
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    • 2012
  • 기존의 저항 전류측정 방법의 경우 샘플링이 되지 않는 시간에도 전류가 센서 저항에 흐르게 되어 전력낭비가 있었다. 본 논문에서는 센서저항에 병렬로 바이패스 MOSFET를 달아줌으로써 샘플링이 되는 시간에서는 MOSFET off동작을 통해 저항에 전류를 흐르게 하여 전류를 측정하고 샘플링이 되지 않는 시간에서는 MOSFET on동작을 통해 전류가 센서저항에 흐르지 않게 하여 전력낭비를 막고, 센서저항이 감당하는 정격전력도 낮추는 이점이 있는 저항 전류 측정방법을 제안하고자 한다.

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Highly-Sensitive Gate/Body-Tied MOSFET-Type Photodetector Using Multi-Finger Structure

  • Jang, Juneyoung;Choi, Pyung;Kim, Hyeon-June;Shin, Jang-Kyoo
    • Journal of Sensor Science and Technology
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    • v.31 no.3
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    • pp.151-155
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    • 2022
  • In this paper, we present a highly-sensitive gate/body-tied (GBT) metal-oxide semiconductor field-effect transistor (MOSFET)-type photodetector using multi-finger structure whose photocurrent increases in proportion to the number of fingers. The drain current that flows through a MOSFET using multi-finger structure is proportional to the number of fingers. This study intends to confirm that the photocurrent of a GBT MOSFET-type photodetector that uses the proposed multi-finger structure is larger than the photocurrent per unit area of the existing GBT MOSFET-type photodetectors. Analysis and measurement of a GBT MOSFET-type photodetector that utilizes a multi-finger structure confirmed that photocurrent increases in ratio to the number of fingers. In addition, the characteristics of the photocurrent in relation to the optical power were measured. In order to determine the influence of the incident the wavelength of light, the photocurrent was recorded as the incident the wavelength of light varied over a range of 405 to 980 nm. A highly-sensitive GBT MOSFET-type photodetector with multi-finger structure was designed and fabricated by using the Taiwan semiconductor manufacturing company (TSMC) complementary metal-oxide-semiconductor (CMOS) 0.18 um 1-poly 6-metal process and its characteristics have been measured.

Electrical Characteristic of Power MOSFET with Zener Diode for Battery Protection IC

  • Kim, Ju-Yeon;Park, Seung-Uk;Kim, Nam-Soo;Park, Jung-Woong;Lee, Kie-Yong;Lee, Hyung-Gyoo
    • Transactions on Electrical and Electronic Materials
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    • v.14 no.1
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    • pp.47-51
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    • 2013
  • A high power MOSFET switch based on a 0.35 ${\mu}m$ CMOS process has been developed for the protection IC of a rechargeable battery. In this process, a vertical double diffused MOS (VDMOS) using 3 ${\mu}m$-thick epi-taxy layer is integrated with a Zener diode. The p-n+Zener diode is fabricated on top of the VDMOS and used to protect the VDMOS from high voltage switching and electrostatic discharge voltage. A fully integrated digital circuit with power devices has also been developed for a rechargeable battery. The experiment indicates that both breakdown voltage and leakage current depend on the doping concentration of the Zener diode. The dependency of the breakdown voltage on doping concentration is in a trade-off relationship with that of the leakage current. The breakdown voltage is obtained to exceed 14 V and the leakage current is controlled under 0.5 ${\mu}A$. The proposed integrated module with the application of the power MOSFET indicates the high performance of the protection IC, where the overcharge delay time and detection voltage are controlled within 1.1 s and 4.2 V, respectively.

Dependency of Phonon-limited Electron Mobility on Si Thickness in Strained SGOI (Silicon Germanium on Insulator) n-MOSFET (Strained SGOI n-MOSFET에서의 phonon-limited전자이동도의 Si두께 의존성)

  • Shim Tae-Hun;Park Jea-Gun
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.42 no.9 s.339
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    • pp.9-18
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    • 2005
  • To make high-performance, low-power transistors beyond the technology node of 60 nm complementary metal-oxide-semiconductor field-effect transistors(C-MOSFETs) possible, the effect of electron mobility of the thickness of strained Si grown on a relaxed SiGe/SiO2/Si was investigated from the viewpoint of mobility enhancement via two approaches. First the parameters for the inter-valley phonon scattering model were optimized. Second, theoretical calculation of the electronic states of the two-fold and four-fold valleys in the strained Si inversion layer were performed, including such characteristics as the energy band diagrams, electron populations, electron concentrations, phonon scattering rate, and phonon-limited electron mobility. The electron mobility in an silicon germanium on insulator(SGOI) n-MOSFET was observed to be about 1.5 to 1.7 times higher than that of a conventional silicon on insulator(SOI) n-MOSFET over the whole range of Si thickness in the SOI structure. This trend was good consistent with our experimental results. In Particular, it was observed that when the strained Si thickness was decreased below 10 nm, the phonon-limited electron mobility in an SGOI n-MOSFT with a Si channel thickness of less than 6 nm differed significantly from that of the conventional SOI n-MOSFET. It can be attributed this difference that some electrons in the strained SGOI n-MOSFET inversion layer tunnelled into the SiGe layer, whereas carrier confinement occurred in the conventional SOI n-MOSFET. In addition, we confirmed that in the Si thickness range of from 10 nm to 3 nm the Phonon-limited electron mobility in an SGOI n-MOSFET was governed by the inter-valley Phonon scattering rate. This result indicates that a fully depleted C-MOSFET with a channel length of less than 15 m should be fabricated on an strained Si SGOI structure in order to obtain a higher drain current.

3.3kV Low Resistance 4H-SiC Semi-SJ MOSFET (3.3kV급 저저항 4H-SiC Semi-SJ MOSFET)

  • Cheon, Jin-Hee;Kim, Kwang-Soo
    • Journal of IKEEE
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    • v.23 no.3
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    • pp.832-838
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    • 2019
  • In this paper, 4H-SiC MOSFET, the next generation power semiconductor device, was studied. In particular, Semi-SJ MOSFET structures with improved electrical characteristics than conventional DMOSFET structures were proposed in the class of 3300V, and static characteristics of conventional and proposed structures were compared and analyzed through TCAD simulations. Semi-SuperJunction MOSFET structure is partly structure that introduces SuperJunction, improves Electric field distribution through the two-dimensional depletion effect, and increases breakdown voltage. Benefit from the improvement of breakdown voltage, which can improve the on resistance as high doping is possible. The proposed structure has a slight reduction in breakdown voltage, but has an 80% decrease in on resistance compared to the conventional DMOSFET structure, and a 44% decrease in on resistance compared to the Current Spreading Layer(CSL) structure that improves the conventional DMOSFET structure.

SiC Mosfet's Application

  • Kim, Simon
    • Proceedings of the KIPE Conference
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    • 2018.07a
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    • pp.519-521
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    • 2018
  • For most of application, total system cost is first priority to Engineer. Approach for making system cost down can be to reduce cooling cost by selecting low loss item or reducing filter cost by increasing frequency. SiC Mosfet ($CoolSiC^{TM}$) can approach both of case. This paper shows market-needs and reviews each application with SiC.

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