• 대한전기학회:학술대회논문집
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• 대한전기학회 2001년도 하계학술대회 논문집 C
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• pp.1427-1429
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• 2001

Polycrystalline silicon(poly-Si) films are deposited on low temperature glass substrate by Hot-Wire CVD(HWCVD). The structural properties of the poly-Si films are strongly dependent on the wire temperature($T_w$). The films deposited at high $T_w$ of 2000$^{\circ}C$ have superior crystalline properties; average lateral grain sizes are larger than $1{\mu}m$ and there at·e no vertical grain boundaries. The surface of the high $T_w$ samples are naturally textured like pyramid shape. These large grain size and textured surface are believed to give high current density when applied to solar cells. However, the poly-si films are structurally porous and contains high defect density, by which high concentration of C and O resulted within the films by air-penetration after removed from chamber.

• 한국태양에너지학회 논문집
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• 제21권1호
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• pp.1-10
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• 2001

Polycrystalline silicon(poly-Si) films are deposited on low temperature glass substrate by Hot-CVD(HWCVD). The structural properties of the poly-Si films are strongly dependent on the temperature$(T_w)$. The films deposited at high $T_w$ of $2000^{\circ}C$ have superior crystalline proper average lateral grain sizes are larger than $1{\mu}m$ and there are no vertical grain boundaries. The sur of the high $T_w$ samples are naturally textured like pyramid shape. These large grain size and text surface are believed to give high current density when applied to solar cells. However, the poly films are structurally porous and contains high defect density, by which high concentration of C and O resulted within the films by air-penetration after removed from chamber.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1998년도 하계학술대회 논문집 D
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• pp.1333-1336
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• 1998

Hydrogenated amorphous silicon(a-Si:H) films which were deposited by plasma enhanced chemical deposition(PECVD) have been recrystallized by the two-step rapid thermal annealing(RTA) employing the halogen lamp. The a-Si:H films evolve hydrogen explosively during the high temperature crystallzation step. In result, the recrystallized polycrystalline silicon(poly-Si) films have poor surface morphology. In order to avoid the hydrogen evolution, the films have undergone the dehydrogenation step prior to the crystallization step Before the RTA process, the active area of thin film transistors (TFT's) was patterned. The prepatterning of the a-Si:H active islands may reduce thermal damage to the glass substrate during the recrystallization. The computer generated simulation shows the heat propagation from the a-Si:H islands into the glass substrate. We have fabricated the poly-Si TFT's on the silicon wafers. The maximun ON/OFF current ratio of the device was over $10^5$.

• 한국결정성장학회지
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• 제3권1호
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• pp.59-65
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• 1993

저항가열식 고진공증착기를 이용하여 압력센서로 사용될 수 있는 boron이 첨가된 다결정 silicon 박막이 제조되었다. 다결정 silicon 박막은 여러온도에서 quartz 기판위에 증착되었으며, boron은 BN 웨이퍼를 사용하여 확산로에서 doping하였다. $500^{\circ}C$의 기판온도에서 증착된 silicon 박막은 비정질이었으며, $600^{\circ}C$에서 결정을 보이기 시작하였고, $700^{\circ}C$에서 다결정이 되었다. $900^{\circ}C$에서 10분동안 boron을 dopion한 후, 박막의 비저항은 $0.1{\Omega}cm~1.5{\Omega}cm$의 범위에 있었으며, boron 밀도(농도)는 $9.4$\times$10^{15}~2.1$\times${10}^{17}cm^{-3}$이었고, 입자의 크기는 $107{\AA}~191{\AA}$이었다.

• 한국전기전자재료학회논문지
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• 제11권4호
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• pp.255-260
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• 1998

Behavior of solid phase crystallizations (SPC) of RF sputtered and LPCVD amorphous hydrogenated silicon film were investigated. LPCVD films showed the higher degree of crystallinity and larger grain size than sputtered films. The applicable degree of crystallinity was also obtained from sputtered films. The deposition method of amorphous silicon film influenced the behavior of post annealing SPC. Observed degree of crystallinity of sputtered films strongly depended on the partial pressure of hydrogen in deposition. The higher deposition temperature of sputtering provided the better crystallinity after SPC. Due to the high degree of poly-crystallinity, the retardation of larger grain growth was observed on sputtering film.

• 대한금속재료학회지
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• 제46권2호
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• pp.88-96
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• 2008

Thermal evaporated 10 nm-$Ni_{50}Co_{50}$/(70 nm-poly)Si films were deposited to examine the energy saving properties of silicides formed by rapid thermal annealing at temperature ranging from 500 to $1,100^{\circ}C$ for 40 seconds. Thermal evaporated 10 nm-Ni/(70 nm-poly)Si films were also deposited as a reference using the same method for depositing the 10 nm-$Ni_{50}Co_{50}$/(70 nm-poly)Si films. A four-point probe was used to examine the sheet resistance. Transmission electron microscopy (TEM) and X-ray diffraction XRD were used to determine cross sectional microstructure and phase changes, respectively. UV-VIS-NIR and FT-IR (Fourier transform infrared spectroscopy) were used to examine the near-infrared (NIR) and middle-infrared (MIR) absorbance. TEM analysis confirmed that the uniform nickel-cobalt composite silicide layers approximately 21 to 55 nm in thickness had formed on the single and polycrystalline silicon substrates as well as on the 25 to 100 nm thick nickel silicide layers. In particular, nickel-cobalt composite silicides showed a low sheet resistance, even after rapid annealing at $1,100^{\circ}C$. Nickel-cobalt composite silicide and nickel silicide films on the single silicon substrates showed similar absorbance in the near-IR region, while those on the polycrystalline silicon substrates showed excellent absorbance until the 1,750 nm region. Silicides on polycrystalline substrates showed high absorbance in the middle IR region. Nickel-cobalt composite silicides on the poly-Si substrates annealed at $1,000^{\circ}C$ superior IR absorption on both NIR and MIR region. These results suggest that the newly proposed $Ni_{50}Co_{50}$ composite silicides may be suitable for applications of IR absorption coatings.

• 한국전기전자재료학회논문지
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• 제19권4호
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• pp.334-338
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• 2006

Poly silicon TFT requires high quality dielectric film; conventional method of growing silicon dioxide needs highly hazardous chemicals such as silane. We have grown high quality dielectric film of silicon dioxide using non-hazardous chemical such as TFOS and ozone as reaction gases by APCVD. The films grown were characterized through C-V curves of MOS structures. Conventional APCVD requires high temperature processing where as in the process of current study, we developed a low temperature process. Interface trap density was substantially decreased in the silicon surface coated with the silicon dioxide film after annealing in nitrogen ambient. The interface with such low trap density could be used for poly silicon TFT fabrication with cheaper cost and potentially less hazards.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2012년도 제43회 하계 정기 학술대회 초록집
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• pp.254-255
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• 2012

Interest in nano-crystalline silicon (nc-Si) thin films has been growing because of their favorable processing conditions for certain electronic devices. In particular, there has been an increase in the use of nc-Si thin films in photovoltaics for large solar cell panels and in thin film transistors for large flat panel displays. One of the most important material properties for these device applications is the macroscopic charge-carrier mobility. Hydrogenated amorphous silicon (a-Si:H) or nc-Si is a basic material in thin film transistors (TFTs). However, a-Si:H based devices have low carrier mobility and bias instability due to their metastable properties. The large number of trap sites and incomplete hydrogen passivation of a-Si:H film produce limited carrier transport. The basic electrical properties, including the carrier mobility and stability, of nc-Si TFTs might be superior to those of a-Si:H thin film. However, typical nc-Si thin films tend to have mobilities similar to a-Si films, although changes in the processing conditions can enhance the mobility. In polycrystalline silicon (poly-Si) thin films, the performance of the devices is strongly influenced by the boundaries between neighboring crystalline grains. These grain boundaries limit the conductance of macroscopic regions comprised of multiple grains. In much of the work on poly-Si thin films, it was shown that the performance of TFTs was largely determined by the number and location of the grain boundaries within the channel. Hence, efforts were made to reduce the total number of grain boundaries by increasing the average grain size. However, even a small number of grain boundaries can significantly reduce the macroscopic charge carrier mobility. The nano-crystalline or polymorphous-Si development for TFT and solar cells have been employed to compensate for disadvantage inherent to a-Si and micro-crystalline silicon (${\mu}$-Si). Recently, a novel process for deposition of nano-crystralline silicon (nc-Si) thin films at room temperature was developed using neutral beam assisted chemical vapor deposition (NBaCVD) with a neutral particle beam (NPB) source, which controls the energy of incident neutral particles in the range of 1~300 eV in order to enhance the atomic activation and crystalline of thin films at room temperature. In previous our experiments, we verified favorable properties of nc-Si thin films for certain electronic devices. During the formation of the nc-Si thin films by the NBaCVD with various process conditions, NPB energy directly controlled by the reflector bias and effectively increased crystal fraction (~80%) by uniformly distributed nc grains with 3~10 nm size. The more resent work on nc-Si thin film transistors (TFT) was done. We identified the performance of nc-Si TFT active channeal layers. The dependence of the performance of nc-Si TFT on the primary process parameters is explored. Raman, FT-IR and transmission electron microscope (TEM) were used to study the microstructures and the crystalline volume fraction of nc-Si films. The electric properties were investigated on Cr/SiO2/nc-Si metal-oxide-semiconductor (MOS) capacitors.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2005년도 제36회 하계학술대회 논문집 C
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• pp.2052-2054
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• 2005

TFT-LCD requires to use poly silicon for High resolution and High integration. Thin film make of Poly silicon on the excimer laser-induced crystallization of PECVD(plasma-enhanced chemical vapor deposition)-grown amorphous silicon. In the thin film hydrogen affects to a device performance from bad elements like eruption, void and etc. So dehydrogenation prior to laser exposure was necessary. In this study, use RTP(Rapid Thermal Process) at various temperature from $670^{\circ}C$ to $750^{\circ}C$ and fabricate poly-silicon. it propose optimized RTP window to compare grain size to use poly silicon's SEM pictures and crystallization to analyze Raman curved lines.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2007년도 7th International Meeting on Information Display 제7권2호
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• pp.1266-1269
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• 2007

Polycrystalline silicon (poly-Si) films were prepared directly on plastic substrates at a low (< $200^{\circ}C$) by using Catalytic Chemical Vapor Deposition (Cat-CVD) technique without subsequent annealing steps. Surface roughness of the poly-Si layer and the density of the gate dielectric layer were found to be influential to the TFT performance.