• Journal of the Institute of Electronics Engineers of Korea SD
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• v.39 no.1
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• pp.67-75
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• 2002

In this Paper, we discuss the PEEC method and construct the PEEC equivalent circuit of the test structure and construct the system matrix, which was simulated by numerical analysis. And we got node voltages and currents. Constructing the equivalent circuit, we extracted the parasitic parameter(R, L, C)using the simulator, which is based on finite element method, hence we could simulate the transient analysis.

• Journal of Microbiology and Biotechnology
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• v.30 no.3
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• pp.359-367
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• 2020

Neurodegenerative disorders in the elderly are characterized by gradual loss of memory and cognitive function. Oxidative stress caused by reactive oxygen species is associated with progressive neuronal cell damage and death in Alzheimer's disease, one of the most common neurodegenerative disorders. An edible brown seaweed, Ecklonia cava, contains a variety of biologically active compounds such as phlorotannins. In this study, we comparatively evaluated the total phenolic content, antioxidant capacity, and neuroprotective effects of the phlorotannin-rich extract from E. cava (PEEC). The total phenolic content of PEEC and dieckol was 810.8 mg gallic acid equivalents (GAE)/g and 996.6 mg GAE/g, respectively. Antioxidant capacity of PEEC was 1,233.8 mg vitamin C equivalents (VCE)/g and 392.1 mg VCE/g determined using ABTS and DPPH assays, respectively, while those of dieckol were 2,238.4 mg VCE/g and 817.7 mg VCE/g. High-performance liquid chromatography results revealed 48.08 ± 0.67 mg dieckol/g of PEEC. PEEC had neuroprotective effects in pheochromocytoma (PC-12) and human neuroblastoma (SH-SY5Y) cells against H₂O₂- and AAPH-induced oxidative damage, partly due to reduced intracellular oxidative stress. PEEC treatment inhibited acetylcholinesterase and butyrylcholinesterase in a dose-dependent manner. Taken together, these findings suggest that PEEC is a good source of antioxidants and neuroprotective materials.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.14 no.8
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• pp.823-829
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• 2003

For high frequency microstrip line modelling, a fast inductance extraction technique using an adaptive PEEC(partial element equivalent circuit) grid is proposed. The grid refinement technique is based on the current distribution depend on the excitation frequencies and the geometry of the microstrip lines. The adaptive ids are refined mainly in the area where heavy currents reside. This technique is applied to the inductance extraction of the microstrip lines. The results show fast convergence, and this adaptive technique is efficient to reduce computing time and the number of grids.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.07b
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• pp.669-672
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• 2003

With the advances on wireless internet technology, many research on minimization of wireless LAN is on the progress. To apply passive components in MCM, characteristic analysis of passive components is essential. In this paper, three square spiral inductors were modeled by HSPICE using PEEC (Partial Element Equivalent Circuit) method. Afterwards, Monte-Carlo analysis was performed to evaluate the optimized parameters. This work will give an idea on PEEC modeling of spiral inductor, and enable researchers with predictive data before large scale manufacturing.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.28 no.11
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• pp.902-915
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• 2017

In recent years, mobile devices have become increasingly multi-functional and high performance, resulting in a dramatical increase in processing speed. On the other hand, the size of device is reduced, circuits inside the device are more easily exposed to electromagnetic interference radiated from antenna or adjacent circuits, degrading the system performance. To prevent this, it is necessary to design the device considering the electromagnetic characteristics with EM simulation at the design stage of product. However, the EM simulation takes a long analysis time and require high-level system resources for fast analysis. In this paper, an equivalent circuit modeling method for a round wire is proposed using a PEEC method and the electromagnetic coupling from a dipole antenna to a transmission line is analyzed in frequency domain. And compared with the result of electromagnetic simulator. As a result, PEEC method shows good agreement with those of electromagnetic simulation, in a much more short time.

• 한국정보디스플레이학회:학술대회논문집
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• 2003.07a
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• pp.952-954
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• 2003

We report the photo-(PL) and electroluminescence (EL) properties of new conjugated compounds based on carbazolyl vinylene moiety, 3,3'-(1,4-phenylene di-2,1-ethenediyl) bis[9-ethyl-(E,E)-9H-carbazole](PEEC) and 3,3'-([1,1'-biphenyl]-4,4'-diyldi-2,1-ethenediyl)bis[9-ethyl-9H-carbazole](BPEEC), as emitting materials. The ITO/m-MTDATA/NPB/BPEEC/Alq3/LiF/Al device shows bluish-green EL spectrum at 490nm and turn-on voltage at 8V. PEEC shows bluish-green EL around ${\lambda}$ max=496nm and turn-on voltage at 6V and 2.4 Cd/A efficiency in ITO/m-MTDATA/NPB/PEEC/Alq3/LiF/Al device.

• Journal of electromagnetic engineering and science
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• v.11 no.1
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• pp.62-69
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• 2011

This paper proposes a novel electrical characterization approach for a high-performance package system using an improved Partial Element Equivalent Circuit (PEEC). As the effect of interconnects becomes a pivotal factor for the performance of high-speed electronic systems, there is a great demand for an accurate equivalent model for interconnects. In particular, an equivalent model of interconnects is established in this paper for the Fine-Pitch Ball Grid Array (FBGA) package using the improved PEEC method. Based on the equivalent model, electrical characteristics are analyzed; furthermore, these are verified through the measurement results of a Vector Network Analyzer (VNA).

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.12 s.354
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• pp.23-32
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• 2006

Fast and accurate power bus design (FAPUD) method for multi-layers high-speed digital boards is devised for the power supply network design tool for accurate and precise high speed board. FAPUD is constructed, based on two main algorithms of the PBEC (Path Based Equivalent Circuit) model and the network synthesis method. The PBEC model exploits simple arithmetic expressions of the lumped 1-D circuit model from the electrical parameters of a 2-D power distribution network. The circuit level design based on PBEC is carried with the proposed regional approach. The circuit level design directly calculates and determines the size of on-chip decoupling capacitors, the size and the location of off-chip decoupling capacitors, and the effective inductances of the package power bus. As a design output, a lumped circuit model and a pre-layout of the power bus including a whole decoupling capacitors are obtained after processing FAPUD. In the tuning procedure, the board re-optimization considering simultaneous switching noise (SSN) added by I/O switching can be carried out because the I/O switching effect on a power supply noise can be estimated over the operation frequency range with the lumped circuit model. Furthermore, if a design changes or needs to be tuned, FAPUD can modify design by replacing decoupling capacitors without consuming other design resources. Finally, FAPUD is accurate compared with conventional PEEC-based design tools, and its design time is 10 times faster than that of conventional PEEC-based design tools.

• ETRI Journal
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• v.28 no.2
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• pp.182-190
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• 2006

The circuit modeling of interdigitated capacitors fabricated by high-k low-temperature co-fired ceramic (LTCC) sheets was investigated. The s-parameters of each test structure were measured from 50 MHz to 10 GHz, and the modeling was performed using these measured sparameters up to the first resonant frequency. Each test structure was divided into appropriate building blocks. The equivalent circuit of each building block was composed based on the partial element equivalent circuit (PEEC) method. Modeling was executed to optimize the parameters in the equivalent circuit of each building block. The validity of the extracted parameters was verified by the predictive modeling for the test structures with different geometry. After that, Monte Carlo analysis and sensitivity analysis were performed based on the extracted parameters. The modeling methodology can allow a device designer to improve the yield and to save time and cost for the design and manufacturing of devices.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.07a
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• pp.130-133
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• 2004

The characterization of interdigitated capacitors was investigated. The test structures are manufactured by low temperature co-fired ceramic(LTCC) process and their s-parameters were measured. The optimized equivalent circuit models for test structures were obtained using the partial element equivalent circuit(PEEC) method. Predictive modeling was performed on different test structures using optimized parameters to verify the circuit models. From this result, the manufacturability on the process can be improved through the predictive modeling for the characteristics of interdigitated capacitors.