• The Journal of the Acoustical Society of Korea
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• v.41 no.5
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• pp.481-491
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• 2022

The active sonar transmission system consists of a transmitter that outputs an electrical signal and an underwater acoustic transducer that converts the amplified electrical signal into an acoustic signal. In general, the transmitter output characteristics are dependent on load impedance, and an underwater acoustic transducer, which is a transmitter load, has a characteristic that the electrical impedance varies largely according to frequency when driven. In such a variable impedance condition, the output of the active sonar transmission system may become unstable. Hence, this paper proposes a design and control technique of a sonar transmitter for transmitting a stable transmission signal even under variable impedance conditions of an underwater acoustic transducer in an active sonar transmission system. The electrical impedance characteristics of the underwater acoustic transducer are experimentally analyzed, and the sonar transmitter is composed of a single-phase full-bridge inverter, an LC filter, and a matching circuit. In this paper, the design and output control method of the sonar transmitter is proposed to protect the transmitter and transducer. It can secure stable output voltage characteristics even if it transmits the Linear Frequency Modulation (LFM) signal. The validity is verified through the simulation and the experiment.

• The Journal of the Korea institute of electronic communication sciences
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• v.10 no.1
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• pp.13-20
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• 2015

Existing LDMOS power amplifier that used class-AB and doherty system shows 55% of efficiency in 60MHz narrow band. Because RRH has been applied to power amplifier at base station. It is required that over 100MHz expanded band and more than 60% high efficiency power amplifier. In this paper we designed class-J power amplifier using LDMOS FET which has over 60% high efficiency characteristic in 200MHz. The output matching circuit of designed class-J power amplifier has been optimized to contain pure reactance at second harmonic load and has low quality factor Q. As a measurement result of the amplifier, when we input continuous wave signal, we checked 62~70% of power added efficiency(PAE) in 2.06~2.2GHz including WCDMA frequency as a 10W class-J power amplifier.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.26 no.3
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• pp.276-282
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• 2015

Until recently, power amplifiers using LDMOS were Class-AB and Doherty type, and showed 55 % efficiency for narrowband of 60 MHz bandwidth. However, owing to the RRH application of base stations power amplifier module, a bandwidth expansion of at least 100 MHz and high efficiency power amplifiers of at least 60 % power efficiency are required. In this study, a Class-J power amplifier was designed by optimizing an output matching circuit so that the second harmonic load will contain a pure reactance element only and have broadband characteristics by using GaN HEMT. The measurements showed that a 45 W Class-J power amplifier with a power added efficiency of 60~75 % was achieved when continuous wave signals were input at 1.6~2.3 GHz, including W-CDMA application.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.4
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• pp.49-58
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• 2014

A low-swing differential near-ground signaling (NGS) transceiver for low-power high-speed mobile I/O interface is presented. The proposed transmitter adopts an on-chip regulated programmable-swing voltage-mode driver and a pre-driver with asymmetric rising/falling time. The proposed receiver utilizes a new multiple gain-path differential amplifier with feed-forward capacitors that boost high-frequency gain. Also, the receiver incorporates a new adaptive bias generator to compensate the input common-mode variation due to the variable output swing of the transmitter and to minimize the current mismatch of the receiver's input stage amplifier. The use of the new simple and effective impedance matching techniques applied in the transmitter and receiver results in good signal integrity and high power efficiency. The proposed transceiver designed in a 65-nm CMOS technology achieves a data rate of 13 Gbps/channel and 0.3 pJ/bit (= 0.3 mW/Gbps) high power efficiency over a 10 cm FR4 printed circuit board.

• The Journal of the Korea institute of electronic communication sciences
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• v.11 no.1
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• pp.23-28
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• 2016

In this paper, a Multi-Band Ku-band down converter was designed for reception of multi-band digital satellite broadcasting. The Multi-band low-nose down converter was designed to form four local oscillator frequencies (9.75, 10, 10.75 and 11.3GHz) representing a low phase noise due to VCO-PLL with respect to input signals of 10.7 to 12.75GHz and 3-stage low noise amplifier circuit by broadband noise matching, and to select an one band of intermediate frequency (IF) channels by digital control. The developed low-noise downconverter exhibited the full conversion gain of 64dB, and the noise figure of low-noise amplifier was 0.7dB, the P1dB of output signal 15dBm, and the phase noise -73dBc@100Hz at the band 1 carrier frequency of 9.75GHz. The low noise block downconverter (LNB) for receiving four-band digital satellite broadcasting designed in this paper can be used for satellite broadcasting of vessels navigating international waters.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.17 no.11
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• pp.2479-2485
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• 2013

In this paper, we present a design for solid-state radar SSPA with sequential bias. We apply to variable extension pulse generator to eliminate signal distortion which is caused by bias rising/falling delay of power amplifier. There is an optimum impedance matching circuit to have high efficiency of GaN-power device by measuring microwave characteristics through load-pull method. The designed SSPA is consisted of pre-amplifier, drive-amplifier and main-amplifier as a three stages to apply for X-Band solid-state radar. Thereby we made a 200W SSPA which has output pulse maximum power shows 53.67dBm and its average power is 52.85dBm. The optimum design of transceiver module for solid-state pulse compression radar which is presented in this dissertation, it can be available to miniaturize and to improve the radar performances through additional research for digital radar from now on.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.22 no.11
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• pp.1111-1116
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• 2011

In this paper, a 60 GHz bidirectional active phase shifter with 130 nm CMOS is presented by replacing CMOS passive switchs in switched-line type phase shifter with Common Gate Amplifier(bidirectional amplifier). Bidirectional active phase shifter is composed of bidirectional amplifier blocks and passive delay line network blocks. The suitable topology of bidirectional amplifier block is CGA(Common Gate Amplifier) topology and matching circuits of input and output are symmetrical due to design same characteristic of it's forward and reverse way. The direction(forward and reverse way) and amplitude of amplification can be controlled by only one bias voltage($V_{DS}$) using combination bias circuit. And passive delay line network blocks are composed of microstrip line. An 1-bit phase shifter is fabricated by Dongbu HiTek 1P8M 130-nm CMOS technology and simulation results present -3 dB average insertion loss and respectively 90 degree and 180 degree phase shift at 60 GHz.

• Journal of IKEEE
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• v.3 no.2 s.5
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• pp.221-225
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• 1999

In this paper, a new type of predistortion linearizer has been studied. It employs a series feedback amplifier with a large source inductance as a predistortion linearizer, which provides positive amplitude and negative phase deviations for input Power and can compensate for AM-AM and AM-PM distortions of power amplifier. This predistortion lineariaer consists of only one CaAs FET, large source inductor, input output matching networks and bias circuits. Because of its simple circuit, the linear can be operated over a broad bandwidth and has good thermal stability The characteristics of this linearizer can be easily tuned using source inductor, its gate bias condition. In fabricated linearizer, the third-order intermodulation distortion(IMD) for main amplifier alone is 10.61dBc, and the $IM_3$ for main amplifier with predistorter is 21.91dBc. Therefore, the $IM_3$ characteristic results an improvement of approximately 11dB.

• Journal of Advanced Navigation Technology
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• v.9 no.2
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• pp.103-109
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• 2005

This paper presents the design of a broadband hybrid mixer using dual-gate FET topology with a low-pass filter which improves return loss of output to isolate RF and LO signal. The low-pass filter shows the isolation with RF and LO signal of better than 40 dBc from 1.5 GHz to 5.5 GHz. The dual-gate mixer which has been designed by using cascade topology operates when the lower FET is biased in linear region and the upper FET is in saturation region. The input matching circuit has been designed to have conversion gain from 1.5 GHz to 5.5 GHz. The designed mixer with low-pass filter shows the conversion gain of better than 7 dB from 1.5 GHz to 5.5 GHz at the low LO power level of 0 dBm with the fixed IF frequency of 21.4 MHz.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.9 no.4
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• pp.506-514
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• 1998

The design and fabrication of X-band(11.7~12 GHz) 2-stage monolithic microwave integrated circuit(MMIC) low noise amplifier (LNA) for active antenna are presented using $0.15{\mu}m\times140{\mu}m$ AlGaAs/InGaAs/GaAs pseudomorphic high electron mobility transistor (P-HEMT). In each stage of the LNA, a series feedback by using a source inductor is used for both input matching and good stability. The measurement results are achieved as an input return loss under -17 dB, an output return loss under -15dB, a noise figure of 1.3dB, and a gain of 17 dB at X-band. This results almost concur with a design results except noise figure(NF). The chip size of the MMIC LNA is $1.43\times1.27$.