• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 하계학술대회 논문집 Vol.9
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• pp.134-135
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• 2008

Ultra-thin $SiO_2/ZrO_2$ dielectrics were deposited by atomic layer chemical vapor deposition (ALCVD) method for non-volatile memory application. Metal-oxide-semiconductor (MOS) capacitors were fabricated by stacking ultra-thin $SiO_2$ and $ZrO_2$ dielectrics. It is found that the tunneling current through the stacked dielectric at the high voltage is lager than that through the conventional silicon oxide barrier. On the other hand, the tunneling leakage current at low voltages is suppressed. Therefore, the use of ultra-thin $SiO_2/ZrO_2$ dielectrics as a tunneling barrier is promising for the future high integrated non-volatile memory.

• Journal of Advanced Marine Engineering and Technology
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• 제31권4호
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• pp.410-416
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• 2007

PRAM (Phase change random access memory) is one of the most promising candidates for next generation non-volatile memories. However, the high reset current is one major obstacle to develop a high density PRAM. One way of the reset current reduction is to change the heater electrode material. In this paper, to reduce the reset current for phase transition, we have investigated the effect of heater electrode material parameters using finite element analysis. From the simulation. the reset current of PRAM cell is reduced from 2.0 mA to 0.72 mA as the electrical conductivity of heater is decreased from $1.0{\times}10^6\;(1/{\Omega}{\cdot}m$) to $1.0{\times}10^4\;(1/{\Omega}{\cdot}m$). As the thermal conductivity of heater is decreased, the reset current is slightly reduced. But the reset current of PRAM cell is not changed as the specific heat of heater is changed.

• Nuclear Engineering and Technology
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• 제54권1호
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• pp.275-282
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• 2022

The aim of this work is to develop the fractional Bateman equations, which can model memory effects in successive isotopes transformations. Such memory effects have been previously reported in the alpha decay, which exhibits a non-Markovian behavior. Since there are radioactive decay series with consecutive alpha decays, it is convenient to include the mentioned memory effects, developing the fractional Bateman Equations, which can reproduce the standard ones when the fractional order is equal to one. The proposed fractional model preserves the mathematical shape and the symmetry of the standard equations, being the only difference the presence of the Mittag-Leffler function, instead of the exponential one. This last is a very important result, because allows the implementation of the proposed fractional model in burnup and activation codes in a straightforward way. Numerical experiments show that the proposed equations predict high decay rates for small time values, in comparison with the standard equations, which have high decay rates for large times. This work represents a novelty approach to the theory of successive transformations, and opens the possibility to study properties of the Bateman equation from a fractional approach.

• 한국전자통신학회논문지
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• 제7권5호
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• pp.1061-1066
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• 2012

디지털 메모리는 신뢰성, 속도 그리고 상대적인 단순한 제어회로로 인해 지금까지 저장장치로서 널리 사용되어 왔다. 그러나 디지털 메모리 저장능력은 공정의 선폭감소의 한계로 인해 결국 한계에 다다르게 될 것이다. 이러한 저장 능력을 획기적으로 증가시키는 방안의 하나로서 메모리의 셀에 저장하는 데이터의 형태를 디지털에서 아날로그로 변화시키는 것이다. 한 개의 셀과 프로그래밍을 위한 주변회로로 구성된 아날로그 메모리가 0.16um 표준 CMOS 공정에서 제작되었다. 제작된 아날로그 메모리는 저밀도 불활성 메모리, SRAM과 DRAM에서 리던던시 회로 제어, ID나 보안코드 레지스터, 영상이나 음성 저장장치 등에 응용될 것이다.

• 한국정보과학회논문지:시스템및이론
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• 제37권1호
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• pp.19-26
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• 2010

본 논문에서는 차세대 비휘발성램 기술인 스토리지 클래스 메모리(SCM)와 DRAM을 병렬적으로 메인 메모리로서 도입하고, SCM+DRAM 메인 메모리 시스템을 시스템 신뢰성 측면에서 활용한다. 본 시스템에서는 부팅 없는 즉각적인 시스템 온/오프, 프로세스의 동적인 영속성 또는 비영속성의 선택, 그리고 이를 통하여 전원과 소프트웨어 장애로부터의 빠른 복구를 제공한다. 본 논문에서 제안하는 시스템의 장점은 체크포인팅에서의 문제들, 즉 심각한 오버헤드와 복구 지연을 야기하지 않으며, 특히 응용 프로그램에 대한 완전한 투명성을 제공하기 때문에 보편적인 응용 프로그램에 영속성을 제공할 수 있어 실제 환경에 적용되기가 쉽다. 우리는 이를 검증하기 위해 상용 운영체제인 리눅스 커널 2.6.21을 기반으로 시스템을 구현하였고, 실험을 통해 영속성이 지정된 프로세스가 시스템의 오프-온 후 데이터 손실 없이 즉각적으로 실행을 지속하는 것을 알 수 있었으며, 이를 통하여 우리는 본 시스템에서 가용성과 신뢰성이 향상될 수 있음을 확인하였다.

• 한국정보통신학회논문지
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• 제7권2호
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• pp.269-275
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• 2003

저전압 프로그래밍이 가능한 플래시메모리를 실현하기 위하여 0.35$\mu\textrm{m}$ CMOS 공정 기술을 이용하여 터널링산화막, 질화막 그리고 블로킹산화막의 두께가 각각 2.4nm, 4.0nm, 2.5nm인 SONOS 트랜지스터를 제작하였으며, SONOS 메모리 셀의 면적은 1.32$\mu$$m^2$이었다. 질화막의 두께를 스케일링한 결과, 10V의 동작 전압에서 소거상태로부터 프로그램상태로, 반대로 프로그램상태에서 소거상태로 스위칭 하는데 50ms의 시간이 필요하였으며, 최대 메모리윈도우는 1.76V이었다. 그리고 질화막의 두께를 스케일링함에도 불구하고 10년 후에도 0.5V의 메모리 윈도우를 유지하였으며, 105회 이상의 프로그램/소거 반복동작이 가능함을 확인하였다. 마지막으로 부유게이트 소자에서 심각하게 발생하고있는 과도소거현상이 SONOS 소자에서는 나타나지 않았다.

• Transactions on Electrical and Electronic Materials
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• 제11권6호
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• pp.243-248
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• 2010

The emergence of different and disparate materials together with the convergence of both the 'old' and 'emerging' technologies is paving the way for integration of heterogeneous technologies that are likely to extend the limitations of silicon technology beyond the roadmap envisaged for complementary metal-oxide semiconductor. Formulation of new information processing concepts based on novel aspects of nano-scale based materials is the catalyst for new nanoarchitectures driven by a different perspective in realization of novel logic devices. The memory technology has been the pace setter for silicon scaling and thus far has pave the way for new architectures. This paper provides an overview of the inevitability of heterogeneous integration of technologies that are in their infancy through initiatives of material physicists, computational chemists, and bioengineers and explores the options in the spectrum of novel non-volatile memory technologies considered as forerunner of new logic devices.

• 한국군사과학기술학회지
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• 제14권4호
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• pp.607-614
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• 2011

This paper describes the development of pulse code modulation(PCM) data recorder with design, implementation and environmental test. PCM serial data that diverged from telemetry encoder output is used as the input and is reformed to parallel signal through FPGA processing. Controllers construct the packet by the sector and record it into non-volatile memory. Compact flash(CF) memory for data storage media, USB interface for data downloading, and a software for operating status diagnosis and file format conversion are used.

• JSTS:Journal of Semiconductor Technology and Science
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• 제15권5호
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• pp.476-484
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• 2015

Due to the recent advances in non-volatile memory technologies such as PCM, a new memory hierarchy of computer systems is expected to appear. In this paper, we explore the performance of PCM-based swap systems and discuss how this system can be managed efficiently. Specifically, we introduce three management techniques. First, we show that the page fault handling time can be reduced by attaching PCM on DIMM slots, thereby eliminating the software stack overhead of block I/O and the context switch time. Second, we show that it is effective to reduce the page size and turn off the read-ahead option under the PCM swap system where the page fault handling time is sufficiently small. Third, we show that the performance is not degraded even with a small DRAM memory under a PCM swap device; this leads to the reduction of DRAM's energy consumption significantly compared to HDD-based swap systems. We expect that the result of this paper will lead to the transition of the legacy swap system structure of "large memory - slow swap" to a new paradigm of "small memory - fast swap."

• Journal of Information Technology Applications and Management
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• 제13권4호
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• pp.257-271
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• 2006

Recently, flash memories are one of best media to support portable computer's storages in mobile computing environment. The features of non-volatility, low power consumption, and fast access time for read operations are sufficient grounds to support flash memory as major database storage components of portable computers. However, we need to improve traditional Indexing scheme such as B-Tree due to the relatively slow characteristics of flash operation as compared to RAM memory. In order to achieve this goal, we devise a new indexing scheme called F-Tree. F-Tree improves tree operation performance by compressing pointers and keys in tree nodes and rewriting the nodes without a slow erase operation in node insert/delete processes. Based on the results of the performance evaluation, we conclude that F-Tree indexing scheme outperforms the traditional indexing scheme.