• 제목/요약/키워드: Nano-electronics

검색결과 743건 처리시간 0.032초

펨토초 레이저를 이용한 금속 나노패턴 형성 연구 (Formation of nano-pattern on metal using femtosecond laser pulses)

  • 최성철;이영락;노영철;이종민;고도경;이정훈;김강윤;김창종;이웅상;허명구
    • 한국광학회지
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    • 제17권2호
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    • pp.203-206
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    • 2006
  • 펨토초 레이저 펄스를 이용하여 Slide glass 위에 코팅된 Al 박막표면에 나노패턴 구조를 생성하였다. 생성된 나노패턴 구조의 공간적 주기는 레이저 강도와 펄스 수에 의존함을 확인하였고, 레이저 강도와 펄스 수를 미세하게 조절함으로써 Al 샘플 표면에 균일한 나노패턴을 형성 시킬 수 있다. 이와 같은 현상은 레이저 입사빔과 샘플 표면에서 산란되는 빛의 광학적 간섭에서 야기 된다. 또한, Al 박막표면 위에 형성된 산화막이 짧은 주기의 나노패턴을 형성하는데 중요한 역할을 수행하는 것을 확인하였다.

Characteristics of Schottky Diode and Schottky Barrier Metal-Oxide-Semiconductor Field-Effect Transistors

  • Jang, Moon-Gyu;Kim, Yark-Yeon;Jun, Myung-Sim;Lee, Seong-Jae
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제5권2호
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    • pp.69-76
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    • 2005
  • Interface-trap density, lifetime and Schottky barrier height of erbium-silicided Schottky diode are evaluated using equivalent circuit method. The extracted interface trap density, lifetime and Schottky barrier height for hole are determined as $1.5{\times}10^{13} traps/cm^2$, 3.75 ms and 0.76 eV, respectively. The interface traps are efficiently cured by $N_2$ annealing. Based on the diode characteristics, various sizes of erbium- silicided/platinum-silicided n/p-type Schottky barrier metal-oxide-semiconductor field effect transistors (SB-MOSFETs) are manufactured from 20 m to 35nm. The manufactured SB-MOSFETs show excellent drain induced barrier lowering (DIBL) characteristics due to the existence of Schottky barrier between source and channel. DIBL and subthreshold swing characteristics are compatible with the ultimate scaling limit of double gate MOSFETs which shows the possible application of SB-MOSFETs in nanoscale regime.

Organic Thin-Film Transistors with Screen Printed Silver Source/Drain Electrodes

  • Kim, Sam-Soo;Kim, Min-Soo;Choi, Gyu-Seok;Kim, Heon-Gon;Kim, Yong-Bae;Lee, Dong-Gu;Roh, Jae-Seong
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2007년도 7th International Meeting on Information Display 제7권2호
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    • pp.1305-1307
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    • 2007
  • We show that the electrical properties of organic thinfilm transistors(OTFTs) can be enhanced by controlling the morphology of interface between screen printed electrodes and gate dielectrics. Modified surface of the insulator layer($SiO_2$) affect on the interface energy of electrode on $SiO_2$ layer. Contact angle measurement and FT-IR spectrum shows that the interface is properly modified. OTFTs device with high efficiency has been realized through modification of interface layer.

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Effects of Mg Suppressor Layer on the InZnSnO Thin-Film Transistors

  • Song, Chang-Woo;Kim, Kyung-Hyun;Yang, Ji-Woong;Kim, Dae-Hwan;Choi, Yong-Jin;Hong, Chan-Hwa;Shin, Jae-Heon;Kwon, Hyuck-In;Song, Sang-Hun;Cheong, Woo-Seok
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제16권2호
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    • pp.198-203
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    • 2016
  • We investigate the effects of magnesium (Mg) suppressor layer on the electrical performances and stabilities of amorphous indium-zinc-tin-oxide (a-ITZO) thin-film transistors (TFTs). Compared to the ITZO TFT without a Mg suppressor layer, the ITZO:Mg TFT exhibits slightly smaller field-effect mobility and much reduced subthreshold slope. The ITZO:Mg TFT shows improved electrical stabilities compared to the ITZO TFT under both positive-bias and negative-bias-illumination stresses. From the X-ray photoelectron spectroscopy O1s spectra with fitted curves for ITZO and ITZO:Mg films, we observe that Mg doping contributes to an enhancement of the oxygen bond without oxygen vacancy and a reduction of the oxygen bonds with oxygen vacancies. This result shows that the Mg can be an effective suppressor in a-ITZO TFTs.

The ink jet printing of high conductivity circuits on various substrates using polymer capped nano-particle silver

  • Edwards, Charles O.;Howarth, James;James, Anthony
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2005년도 International Meeting on Information Displayvol.I
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    • pp.814-816
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    • 2005
  • In this paper, we describe how specially developed polymer capped, nano-particle silver inks can be used to print circuitry for applications like displays, RFID antennas and "disposable electronics". The requirements of printing on temperature sensitive flexible substrates (such as polymer films and papers) that require low temperature curing is also discussed.

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나노입자를 적용한 냉장고 압축기용 오일의 윤활특성 평가 (Performance Evaluation of Nano-Lubricants at Refrigeration Oil)

  • 이광호;황유진;권래언;이재근;김석로;방선욱
    • 대한설비공학회:학술대회논문집
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    • 대한설비공학회 2008년도 하계학술발표대회 논문집
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    • pp.184-188
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    • 2008
  • It has been recognized that friction coefficient decreased with decreasing viscosity of oil in lubrication. In general, the more viscosity decreases, the more wear rate increases due to decrease load carrying capacity. It has been proposed that nano particles in oil decrease friction coefficient and wear rate. The purpose of this study is to apply oil of lower viscosity that mix with nano particles at the compressor used in a refrigerator to decrease friction coefficient keeping Load carrying capacity. Mineral oil of 8 cSt were used and mixed with nano particle. Friction coefficient was evaluated by a disk-on-disk tester. As a result, friction coefficient of nano oil decreased by 90% in comparison with raw oil. These results lead us to the conclusion that nano oil is new plan to raise efficiency of the compressor.

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SOI edge channel과 나노 점을 갖는 나노 구조의 기억소자 (A Nano-structure Memory with SOI Edge Channel and A Nano Dot)

  • 박근숙;한상연;신형철
    • 전자공학회논문지D
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    • 제35D권12호
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    • pp.48-52
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    • 1998
  • 본 논문에서는 SOI 기판 위에 새롭게 제안된 측면 채널과 나노 점을 갖는 나노 구조의 기억소자를 제작하였다. Top-silicon의 측면이 채널영역이 되고 나노 점이 이 채널 영역의 위에 반응성 이온 식각(RIE)에 의해 형성되는 구조를 가지는 이 소자는 측면 채널(edge channel)의 너비가 SOI기판의 열산화에 의해 얇아진 top-silicon의 두께에 의해 결정되고, 나노 점의 크기는 반응성 이온 식각(RIE) 및 전자선 직접 묘화에 의해 결정된다. 제작된 나노 구조 소자의 I/sub d/-V/sub d/, I/sub d/-V/sub g/ 특성 및 -20V에서 +14V까지의 게이트 전압 영역에서 문턱전압의 변화 범위가 약 1V정도 되는 기억소자의 특성을 얻었다.

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Improving the Thermal Stability of Ni-Silicide Using Ni-V On Boron Cluster Implantend Source/drain for Nano-Scale CMOSFETs

  • 이세광;이원재;장잉잉;종준;정순연;이가원;왕진석;이희덕
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2006년도 추계학술대회 논문집 Vol.19
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    • pp.3-4
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    • 2006
  • 본 논문에서는 nano-scale CMOSFET을 위해 Boron Cluster ($B_{18}H_{22}$)가 이온주입된 SOI 와 Bulk 기판들 이용하였으며 실리사이드의 열 안정성 개선을 위해 Ni-V을 증착한 것과 순수 Ni을 증착한 것을 비교 분석 하였다. 결과 SOI위에 Ni-V을 증착한 것이 제일 낮은 면 저항을 보여주었고 반대로 Bulk위에는 제일 높은 면 저항을 보여 주었다. 단면을 측정한 결과 SOI 위에 Ni-V을 증착한 동일 조건의 Ni보다 Silicide의 두께가 두껍게 형성된 것을 확인하였다.

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나노급 CMOSFET을 윈한 Ni-Co 합금을 이용한 Ni-silicide의 열안정성 개선 (Thermal Stability Improvement of Ni-silicide Using Ni-Co alloy for Nano-Scale CMOSFET Technology)

  • 박기영;장잉잉;정순연;이세광;종준;이가원;왕진석;이희덕
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2007년도 하계학술대회 논문집 Vol.8
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    • pp.27-28
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    • 2007
  • In this paper, Ni-Co alloy was used for improvement of thermal stability of Ni silicide. The proposed Ni/Ni-Co structure exhibited wide temperature window of rapid thermal process. Sheet resistance as well as cross-sectional profile showed stable characteristics in spite of high temperature annealing up to $700^{\circ}C$ for 30min. Therefore, the proposed Ni/Ni-Co structure is highly promising for highly thermal immune Ni silicide for nano-scale CMOSFET technology.

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Fabrication of 1-${\mu}m$ channel length OTFTs by microcontact printing

  • Shin, Hong-Sik;Baek, Kyu-Ha;Yun, Ho-Jin;Ham, Yong-Hyun;Park, Kun-Sik;Lee, Ga-Won;Lee, Hi-Deok;Wang, Jin-Suk;Lee, Ki-Jun;Do, Lee-Mi
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2009년도 9th International Meeting on Information Display
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    • pp.1118-1121
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    • 2009
  • We have fabricated inverted staggered pentacene Thin Film Transistor (TFT) with 1-${\mu}m$ channel length by micro contact printing (${\mu}$-CP) method. Patterning of micro-scale source/drain electrodes without etching was successfully achieved using silver nano particle ink, Polydimethylsiloxane (PDMS) stamp and FC-150 flip chip aligner-bonder. Sheet resistance of the printed Ag nano particle films were effectively reduced by two step annealing at $180^{\circ}C$.

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