• 제목/요약/키워드: Multi chip package

검색결과 52건 처리시간 0.032초

반도체 Package 공정에서 MCP(Multi-chip Package)의 Layer Sequence 제약을 고려한 스케쥴링 방법론 (Scheduling Methodology for MCP(Multi-chip Package) with Layer Sequence Constraint in Semiconductor Package)

  • 정영현;조강훈;정유인;박상철
    • 한국시뮬레이션학회논문지
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    • 제26권1호
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    • pp.69-75
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    • 2017
  • MCP(Multi-chip Package)는 두 개 이상의 Chip을 적층하여 하나의 패키지로 합친 제품이다. MCP를 만들기 위해서는 두 개 이상의 Chip이 동일한 Substrate에 적층되기 때문에 다수의 조립 공정이 필요하다. Package 공정에서는 Lot들이 동일한 특성을 가지는 Chip으로 구성되고 MCP를 구성하는 Chip의 특성은 Layer sequence에 의해 결정된다. MCP 생산 공정에서 WIP Balance 뿐만 아니라 Throughput을 달성하기 위해서는 Chip의 Layer sequence가 중요하다. 본 논문에서는 Chip들의 Layer sequence의 제약 조건을 고려한 스케쥴링 방법론을 제안한다.

Multi Chip Package의 SRAM을 위한 웨이퍼 Burn-in 방법 (Wafer Burn-in Method for SRAM in Multi Chip Package)

  • 윤지영;유장우;김후성;성만영
    • 한국전기전자재료학회논문지
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    • 제18권6호
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    • pp.506-509
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    • 2005
  • This paper presents the improved burn-in method for the reliability of SRAM in Multi Chip Package (MCP). Semiconductor reliability is commonly improved by the burn-in process. Reliability Problem is very significant in the MCP which includes over two chips in a package because the failure of one SRAM chip has a large influence on the yield and quality of the other chips such as Flash Memory, DRAM, etc. Therefore the quality of SRAM must be guaranteed. To improve the qualify of SRAM, we applied the improved wafer level burn-in process using multi cell selection method in addition to the previously used methods and it is found to be effective in detecting particular failures. Finally, with the composition of some kinds of methods, we achieved the high quality of SRAM in MCP.

New Wafer Burn-in Method of SRAM in Multi Chip Package (MCP)

  • Kim, Hoo-Sung;Kim, Hwa-Young;Park, Sang-Won;Sung, Man-Young
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2004년도 추계학술대회 논문집 Vol.17
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    • pp.53-56
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    • 2004
  • This paper presents the improved burn-in method for the reliability of SRAM in MCP Semiconductor reliability is commonly improved through the burn-in process. Reliability problem is more significant in the Multi Chip Package, because of including over two devices in a package. In the SRAM-based Multi Chip Package, the failure of SRAM has a large effect on the yield and quality of the other chips - Flash Memory, DRAM, etc. So, the quality of SRAM must be guaranteed. To improve the quality of SRAM, we applied the improved wafer level burn-in process using multi cell selection method in addition to the current used methods. That method is effective in detecting special failure. Finally, with the composition of some kinds of methods, we could achieve the high qualify of SRAM in Multi Chip Package.

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Wafer Burn-in Method of SRAM for Multi Chip Package

  • Kim, Hoo-Sung;Kim, Je-Yoon;Sung, Man-Young
    • Transactions on Electrical and Electronic Materials
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    • 제5권4호
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    • pp.138-142
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    • 2004
  • This paper presents the improved bum-in method for the reliability of SRAM in Multi Chip Package (MCP). Semiconductor reliability is commonly improved through the bum-in process. Reliability problem is more significant in MCP that includes over two chips in a package, because the failure of one chip (SRAM) has a large influence on the yield and quality of the other chips - Flash Memory, DRAM, etc. Therefore, the quality of SRAM must be guaranteed. To improve the quality of SRAM, we applied the improved wafer level bum-in process using multi cells selection method in addition to the previously used methods. That method is effective in detecting special failure. Finally, with the composition of some kind of methods, we could achieve the high quality of SRAM in Multi Chip Package.

멀티 칩 LED 패키지의 방열 특성 (Thermal Dissipation Characteristics of Multi-Chip LED Packages)

  • 김병호;문철희
    • 조명전기설비학회논문지
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    • 제25권12호
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    • pp.34-41
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    • 2011
  • In order to understand the thermal performance of each LED chips in multi-chip LED package, a quantitative parametric analysis of the temperature evolution was investigated by thermal transient analysis. TSP (Temperature Sensitive Parameter) value was measured and the junction temperature was predicted. Thermal resistance between the p-n junction and the ambient was obtained from the structure function with the junction temperature evolution during the cooling period of LED. The results showed that, the thermal resistance of the each LED chips in 4 chip-LED package was higher than that of single chip- LED package.