• Title/Summary/Keyword: Multi Chip Package

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Scheduling Methodology for MCP(Multi-chip Package) with Layer Sequence Constraint in Semiconductor Package (반도체 Package 공정에서 MCP(Multi-chip Package)의 Layer Sequence 제약을 고려한 스케쥴링 방법론)

  • Jeong, Young-Hyun;Cho, Kang-Hoon;Choung, You-In;Park, Sang-Chul
    • Journal of the Korea Society for Simulation
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    • v.26 no.1
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    • pp.69-75
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    • 2017

  • An MCP(Multi-chip Package) is a package consisting of several chips. Since several chips are stacked on the same substrate, multiple assembly steps are required to make an MCP. The characteristics of the chips in the MCP are dependent on the layer sequence. In the MCP manufacturing process, it is very essential to carefully consider the layer sequence in scheduling to achieve the intended throughput as well as the WIP balance. In this paper, we propose a scheduling methodology considering the layer sequence constraint.

  • https://doi.org/10.9709/JKSS.2017.26.1.069 인용 PDF KSCI

Wafer Burn-in Method for SRAM in Multi Chip Package (Multi Chip Package의 SRAM을 위한 웨이퍼 Burn-in 방법)

  • Yoon, Jee-Young;Ryu, Jang-Woo;Kim, Hoo-Sung;Sung, Man-Young
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.18 no.6
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    • pp.506-509
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    • 2005

  • This paper presents the improved burn-in method for the reliability of SRAM in Multi Chip Package (MCP). Semiconductor reliability is commonly improved by the burn-in process. Reliability Problem is very significant in the MCP which includes over two chips in a package because the failure of one SRAM chip has a large influence on the yield and quality of the other chips such as Flash Memory, DRAM, etc. Therefore the quality of SRAM must be guaranteed. To improve the qualify of SRAM, we applied the improved wafer level burn-in process using multi cell selection method in addition to the previously used methods and it is found to be effective in detecting particular failures. Finally, with the composition of some kinds of methods, we achieved the high quality of SRAM in MCP.

  • https://doi.org/10.4313/JKEM.2005.18.6.506 인용 PDF KSCI

New Wafer Burn-in Method of SRAM in Multi Chip Package (MCP)

  • Kim, Hoo-Sung;Kim, Hwa-Young;Park, Sang-Won;Sung, Man-Young
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2004.11a
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    • pp.53-56
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    • 2004

  • This paper presents the improved burn-in method for the reliability of SRAM in MCP Semiconductor reliability is commonly improved through the burn-in process. Reliability problem is more significant in the Multi Chip Package, because of including over two devices in a package. In the SRAM-based Multi Chip Package, the failure of SRAM has a large effect on the yield and quality of the other chips - Flash Memory, DRAM, etc. So, the quality of SRAM must be guaranteed. To improve the quality of SRAM, we applied the improved wafer level burn-in process using multi cell selection method in addition to the current used methods. That method is effective in detecting special failure. Finally, with the composition of some kinds of methods, we could achieve the high qualify of SRAM in Multi Chip Package.

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Wafer Burn-in Method of SRAM for Multi Chip Package

  • Kim, Hoo-Sung;Kim, Je-Yoon;Sung, Man-Young
    • Transactions on Electrical and Electronic Materials
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    • v.5 no.4
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    • pp.138-142
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    • 2004

  • This paper presents the improved bum-in method for the reliability of SRAM in Multi Chip Package (MCP). Semiconductor reliability is commonly improved through the bum-in process. Reliability problem is more significant in MCP that includes over two chips in a package, because the failure of one chip (SRAM) has a large influence on the yield and quality of the other chips - Flash Memory, DRAM, etc. Therefore, the quality of SRAM must be guaranteed. To improve the quality of SRAM, we applied the improved wafer level bum-in process using multi cells selection method in addition to the previously used methods. That method is effective in detecting special failure. Finally, with the composition of some kind of methods, we could achieve the high quality of SRAM in Multi Chip Package.

  • https://doi.org/10.4313/TEEM.2004.5.4.138 인용 PDF KSCI

Thermal Dissipation Characteristics of Multi-Chip LED Packages (멀티 칩 LED 패키지의 방열 특성)

  • Kim, Byung-Ho;Moon, Cheol-Hee
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.25 no.12
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    • pp.34-41
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    • 2011

  • In order to understand the thermal performance of each LED chips in multi-chip LED package, a quantitative parametric analysis of the temperature evolution was investigated by thermal transient analysis. TSP (Temperature Sensitive Parameter) value was measured and the junction temperature was predicted. Thermal resistance between the p-n junction and the ambient was obtained from the structure function with the junction temperature evolution during the cooling period of LED. The results showed that, the thermal resistance of the each LED chips in 4 chip-LED package was higher than that of single chip- LED package.

  • https://doi.org/10.5207/JIEIE.2011.25.12.034 인용 PDF KSCI