• 한국진공학회:학술대회논문집
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• 한국진공학회 2014년도 제46회 동계 정기학술대회 초록집
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• pp.363-363
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• 2014

Ruthenium (Ru) has attractive material properties due to its promising characteristics such as a low resistivity ($7.1{\mu}{\Omega}{\cdot}cm$ in the bulk), a high work function of 4.7 eV, and feasibility for the dry etch process. These properties make Ru films appropriate for various applications in the state-of-art semiconductor device technologies. Thus, it has been widely investigated as an electrode for capacitor in the dynamic random access memory (DRAM), a metal gate for metal-oxide semiconductor field effect transistor (MOSFET), and a seed layer for Cu metallization. Due to the continuous shrinkage of microelectronic devices, better deposition processes for Ru thin films are critically required with excellent step coverages in high aspect ratio (AR) structures. In these respects, atomic layer deposition (ALD) is a viable solution for preparing Ru thin films because it enables atomic-scale control of the film thickness with excellent conformality. A recent investigation reported that the nucleation of ALD-Ru film was enhanced considerably by using a zero-valent metallorganic precursor, compared to the utilization of precursors with higher metal valences. In this study, we will present our research results on the synthesis and characterization of novel ruthenium complexes. The ruthenium compounds were easy synthesized by the reaction of ruthenium halide with appropriate organic ligands in protic solvent, and characterized by NMR, elemental analysis and thermogravimetric analysis. The molecular structures of the complexes were studied by single crystal diffraction. ALD of Ru film was demonstrated using the new Ru metallorganic precursor and O2 as the Ru source and reactant, respectively, at the deposition temperatures of $300-350^{\circ}C$. Self-limited reaction behavior was observed as increasing Ru precursor and O2 pulse time, suggesting that newly developed Ru precursor is applicable for ALD process. Detailed discussions on the chemical and structural properties of Ru thin films as well as its growth behavior using new Ru precursor will be also presented.

• JSTS:Journal of Semiconductor Technology and Science
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• 제6권1호
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• pp.22-29
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• 2006

We demonstrate highly manufacturable Multi-channel Field Effect Transistor (McFET) on bulk Si wafer. McFET shows excellent transistor characteristics, such as $5{\sim}6 times higher drive current than planar MOSFET, ideal subthreshold swing, low drain induced barrier lowering (DIBL) without pocket implantation and negligible body bias dependency, maintaining the same source/drain resistance as that of a planar transistor due to the unique feature of McFET. And suitable threshold voltage ($V_T$) for SRAM operation and high static noise margin (SNM) are achieved by using TiN metal gate electrode.

• 접착 및 계면
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• 제21권3호
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• pp.107-112
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• 2020

원자층 두께의 전이금속 칼코겐화합물(transition-metal dichalcogenide, TMD) 기반 반도체 소재는 그래핀과 비슷한 구조의 이차원구조를 지니는 소재로서 조절 가능한 밴드갭 뿐만 아니라 우수한 유연성, 투명성 등 다양한 장점으로 인해 다양한 미래사회의 전자소자에 활용될 수 있는 소재로서 각광받고 있다. 하지만 이러한 TMD 소재들은 수분과 산소에 매우 취약하다는 단점 때문에 대기안정성을 해결할 수 있는 다양한 시도가 이루어지고 있다. 본 연구에서는 핫픽업 전사기술을 이용하여 TMD 반도체 소재 중 하나인 WSe₂ 와 이차원 절연체 h-BN와의 수직 헤테로 구조를 제작하여 WSe₂의 대기 안정성을 향상시키기 위한 연구를 수행하였으며, h-BN/WSe₂ 구조를 활용하여 WSe₂ 기반 고성능 전계효과 트랜지스터 제작에 대한 연구를 수행하였다. 제작된 소자의 전기적 특성을 분석한 결과, h-BN에 의해 표면이 안정화된 WSe₂ 기반 소자는 대기안정성 뿐만 아니라 150 ㎠/Vs의 상온 정공 이동도, 3×10⁶의 온/오프 전류비, 192 mV/decade의 서브문턱스윙 등 우수한 전기적 특성을 갖는다는 것 또한 확인할 수 있었다.

• 전자공학회논문지
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• 제50권1호
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• pp.174-179
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• 2013

이 논문에서는 multiple split ring resonator(MSRRs)와 로딩된 스위치드 제어부를 이용하여 2개의 전송영점을 가지는 대역통과 여파기를 설계하였다. 높은 선택도와 칩 사이즈의 초소형화를 위해 비대칭의 급전 선로를 도입하여 통과 대역 주위에 위치한 전송 영점 쌍을 생성하였다. Cross coupling 또는 source-load coupling 방식을 이용한 기존의 여파기와 비교해보면 이 논문에서 제안된 여파기는 단지 2개의 공진기만으로 전송 영점을 생성하여 높은 선택도를 얻었다. 여파기의 선택도와 민감도(삽입 손실)를 최적화하기 위해 비대칭 급전 선로의 위치에 따른 전송 영점과 삽입손실의 관계를 분석하였다. 통과 대역 주파수의 가변과 30dBm 정도의 고 출력 신호를 처리하기 위해 MSRRs의 최 외각 링에 MIM 커패시터와 stacked-FET으로 구성된 SOI-CMOS 스위치드 제어부가 로딩되어 있다. 스위칭 트랜지스터의 전원을 켜고 끔으로써 통과 대역 주파수를 4GHz로부터 5GHz까지 이동시킬 수 있다. 제안된 칩 여파기는 0.18-${\mu}m$ SOI CMOS 기술을 이용함으로써 높은 Q를 가지는 수동 소자와 stacked-FET의 집적을 가능하게 만들었다. 설계된 여파기는 $4mm{\times}2mm$ ($0.177{\lambda}g{\times}0.088{\lambda}g$)의 초소형화 된 크기를 가진다. 여기서 ${\lambda}g$는 중심 주파수에서의 $50{\Omega}$ 마이크로스트립 선로의 관내 파장을 나타낸다. 측정된 삽입손실(S21)은 5.4GHz, 4.5GHz에서 각 각 5.1dB, 6.9dB를 나타내었다. 설계된 여파기는 중심 주파수로부터 500MHz의 오프셋에서 20dB이상의 대역외 저지 특성을 나타내었다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 하계학술대회 논문집
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• pp.137-137
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• 2009

Thin-film transistors (TFTs) that can be prepared at low temperatures have attracted much attention due to the great potential for flexible electronics. One of the mainstreams in this field is the use of organic semiconductors such as pentacene. But device performance of the organic TFTs is still limited by low field effect mobility or rapidly degraded after exposing to air in many cases. Another approach is amorphous oxide semiconductors. Amorphous oxide semiconductors (AOSs) have exactly attracted considerable attention because AOSs were fabricated at room temperature and used lots of application such as flexible display, electronic paper, large solar cells. Among the various AOSs, a-IGZO was considerable material because it has high mobility and uniform surface and good transparent. The high mobility is attributed to the result of the overlap of spherical s-orbital of the heavy pest-transition metal cations. This study is demonstrated the effect of thickness channel layer from 30nm to 200nm. when the thickness was increased, turn on voltage and subthreshold swing were decreased. a-IGZO TFTs have used a shadow mask to deposit channel and source/drain(S/D). a-IGZO were deposited on SiO2 wafer by rf magnetron sputtering. using power is 150W, working pressure is 3m Torr, and an O2/Ar(2/28 SCCM) atmosphere at room temperature. The electrodes were formed with Electron-beam evaporated Ti(30nm) and Au(70nm) structure. Finally, Al(150nm) as a gate metal was evaporated. TFT devices were heat treated in a furnace at $250^{\circ}C$ in nitrogen atmosphere for an hour. The electrical properties of the TFTs were measured using a probe-station to measure I-V characteristic. TFT whose thickness was 150nm exhibits a good subthreshold swing(S) of 0.72 V/decade and high on-off ratio of 1E+08. Field effect mobility, saturation effect mobility, and threshold voltage were evaluated 7.2, 5.8, 8V respectively.

• 대한전자공학회논문지SD
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• 제39권1호
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• pp.83-88
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• 2002

HFET 소자의 선형성과 게이트-트레인 항복특성을 향상시키기 위해 부분채널 도핑된 Al/sub 0.25/Ga/sub 0.75/As/In/sub 0.25/Ga/sub 0.75/As/Al/sub 0.25/Ga/sub 0.75/As 이종접합 구조를 갖는 FET를 제안하였다. 제안된 HFET는 게이트 전극 아래로 도핑되지 않은 AlGaAs 진성공급층을 두어 -2OV 의 높은 항복전압을 얻었다. 또한 소자의 InGaAs 채널에 부분 도핑을 실시하여, 균일 채널 도핑을 실시한 경우보다 향상된 선형성을 유도하였고, 2차원 전산모사 견과와 제작 및 측정결과를 통해 선형성의 향상을 확인하였다. 본 실험에서 제안된 HFET소자는 DC측정 결과와 고주파측정 결과 모두에서 기존의 FET소자들에 비해 향상된 선형성을 나타내었다.

• 한국재료학회지
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• 제18권3호
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• pp.148-152
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• 2008

A new cost-effective atomic layer deposition (ALD) technique, known as Proximity-Scan ALD (PS-ALD) was developed and its benefits were demonstrated by depositing $Al_2O_3$ and $HfO_2$ thin films using TMA and TEMAHf, respectively, as precursors. The system is consisted of two separate injectors for precursors and reactants that are placed near a heated substrate at a proximity of less than 1 cm. The bell-shaped injector chamber separated but close to the substrate forms a local chamber, maintaining higher pressure compared to the rest of chamber. Therefore, a system configuration with a rotating substrate gives the typical sequential deposition process of ALD under a continuous source flow without the need for gas switching. As the pressure required for the deposition is achieved in a small local volume, the need for an expensive metal organic (MO) source is reduced by a factor of approximately 100 concerning the volume ratio of local to total chambers. Under an optimized deposition condition, the deposition rates of $Al_2O_3$ and $HfO_2$ were $1.3\;{\AA}/cycle$ and $0.75\;{\AA}/cycle$, respectively, with dielectric constants of 9.4 and 23. A relatively short cycle time ($5{\sim}10\;sec$) due to the lack of the time-consuming "purging and pumping" process and the capability of multi-wafer processing of the proposed technology offer a very high through-put in addition to a lower cost.

• ETRI Journal
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• 제24권4호
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• pp.290-298
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• 2002

We present, for the first time, a prototype active-matrix field emission display (AMFED) in which an amorphous silicon thin-film transistor (a-Si TFT) and a molybdenum-tip field emitter array (Mo-tip FEA) were monolithically integrated on a glass substrate for a novel active-matrix cathode (AMC) plate. The fabricated AMFED showed good display images with a low-voltage scan and data signals irrespective of a high voltage for field emissions. We introduced a light shield layer of metal into our AMC to reduce the photo leakage and back channel currents of the a-Si TFT. We designed the light shield to act as a focusing grid to focus emitted electron beams from the AMC onto the corresponding anode pixel. The thin film depositions in the a-Si TFTs were performed at a high temperature of above 360°C to guarantee the vacuum packaging of the AMC and anode plates. We also developed a novel wet etching process for $n^+-doped$ a-Si etching with high etch selectivity to intrinsic a-Si and used it in the fabrication of an inverted stagger TFT with a very thin active layer. The developed a-Si TFTs performed well enough to be used as control devices for AMCs. The gate bias of the a-Si TFTs well controlled the field emission currents of the AMC plates. The AMFED with these AMC plates showed low-voltage matrix addressing, good stability and reliability of field emission, and good light emissions from the anode plate with phosphors.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 추계학술대회 논문집
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• pp.5-5
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• 2009

Thin-film-transistors (TFTs) that can be prepared at low temperatures have attracted much attention because of the great potential for transparent and flexible electronics. One of the mainstreams in this field is the use of organic semiconductors such as pentacene. But device performance of the organic TFTs is still limited due to low field-effect mobility and rapid degradation after exposing to air. Alternative approach is the use of amorphous oxide semiconductors as a channel. Amorphous oxide semiconductors (AOSs) based TFTs showed the fast technological development, because AOS films can be fabricated at room temperature and exhibit the possibility in application like flexible display, electronic paper, and larges solar cells. Among the various AOSs, a-IGZO has lots of advantages because it has high channel mobility, uniform surface roughness and good transparency. [1] The high mobility is attributed to the overlap of spherical s-orbital of the heavy post-transition metal cations. This study demonstrated the effect of the variation in channel thickness from 30nm to 200nm on the TFT device performance. When the thickness was increased, turn-on voltage and subthreshold swing was decreased. The a-IGZO channels and source/drain metals were deposited with shadow mask. The a-IGZO channel layer was deposited on $SiO_2$/p-Si substrates by RF magnetron sputtering, where RF power is 150W. And working pressure is 3m Torr, at $O_2/Ar$ (2/28 sccm) atmosphere. The electrodes were formed with electron-beam evaporated Ti (30 nm) and Au (70 nm) bilayer. Finally, Al (150nm) as a gate metal was thermal-evaporated. TFT devices were heat-treated in a furnace at 250 $^{\circ}C$ and nitrogen atmosphere for 1hour. The electrical properties of the TFTs were measured using a probe-station. The TFT with channel thickness of 150nm exhibits a good subthreshold swing (SS) of 0.72 V/decade and on-off ratio of $1{\times}10^8$. The field effect mobility and threshold voltage were evaluated as 7.2 and 8 V, respectively.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 하계학술대회 논문집 Vol.9
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• pp.169-169
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• 2008

To keep pace with scaling trends of CMOS technologies, high-k metal oxides are to be introduced. Due to their high permittivity, high-k materials can achieve the required capacitance with stacks of higher physical thickness to reduce the leakage current through the scaled gate oxide, which make it become much more promising materials to instead of $SiO_2$. As further studying on high-k, an understanding of the relation between the etch characteristics of high-k dielectric materials and plasma properties is required for the low damaged removal process to match standard processing procedure. There are some reports on the dry etching of different high-k materials in ICP and ECR plasma with various plasma parameters, such as different gas combinations ($Cl_2$, $Cl_2/BCl_3$, $Cl_2$/Ar, $SF_6$/Ar, and $CH_4/H_2$/Ar etc). Understanding of the complex behavior of particles at surfaces requires detailed knowledge of both macroscopic and microscopic processes that take place; also certain processes depend critically on temperature and gas pressure. The choice of $BCl_3$ as the chemically active gas results from the fact that it is widely used for the etching o the materials covered by the native oxides due to the effective extraction of oxygen in the form of $BCl_xO_y$ compounds. In this study, the surface reactions and the etch rate of $Al_2O_3$ films in $BCl_3/Cl_2$/Ar plasma were investigated in an inductively coupled plasma(ICP) reactor in terms of the gas mixing ratio, RF power, DC bias and chamber pressure. The variations of relative volume densities for the particles were measured with optical emission spectroscopy (OES). The surface imagination was measured by AFM and SEM. The chemical states of film was investigated using X-ray photoelectron spectroscopy (XPS), which confirmed the existence of nonvolatile etch byproducts.