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Linearity Enhancement of Partially Doped Channel GaAs-based Double Heterostructure Power FETs  

Kim, U-Seok (Dept. of Electronic Electrical Engineering, Pohang University of Science and Technology)
Kim, Sang-Seop (Dept. of Electronic Electrical Engineering, Pohang University of Science and Technology)
Jeong, Yun-Ha (Dept. of Electronic Electrical Engineering, Pohang University of Science and Technology)
Publication Information
Journal of the Institute of Electronics Engineers of Korea SD / v.39, no.1, 2002 , pp. 83-88 More about this Journal
Abstract
To increase the device linearities and the breakdown-voltages of FETs, $Al_{0.25}$G $a_{0.75}$As/I $n_{0.25}$G $a_{0.75}$As/A $l_{0.25}$G $a_{0.75}$As partially doped channel FET(DCFET) structures are proposed. The metal insulator-semiconductor(MIS) like structures show the high gate-drain breakdown voltage(-20V) and high linearities. We propose a partially doped channel structure to enhance the device linearity to the homogeneously doped channel structure. The physics of partially doped channel structure is investigated with 2D device simulation. The devices showed the small ripple of the current cut-off frequency and the power cut-off frequency over the wide bias range. bias range.
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