• Proceedings of the KIEE Conference
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• 1997.07d
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• pp.1267-1269
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• 1997

본 논문에서는 SDB(Silicon Direct Bonding) 기술을 적용하여 빠른 스위칭 속도 및 낮은 도통 전압을 갖는 1200v 10A n-ch IGBT를 제작하였다. 기존의 epi wafer를 이용한 IGBT 제작시 스위칭 속도 개선을 위한 전자조사 방법을 사용하지 않고 buffer의 농도를 증가시켜 아노드 영역의 정공 주입 효율을 제어하여 90ns의 스위칭 속도를 가지며, 2.0V의 도통전압을 갖는 IGBT를 구현하였으며, SDB IGBT 제작시 bonding 계면의 문제 및 표면의 particle 및 결함이 소자의 전기적 특성에 미치는 영향을 고찰하였으며, 이를 실험 결과와 비교 평가하였다.

• Journal of Communications and Networks
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• v.16 no.4
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• pp.385-396
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• 2014

In this paper, we present a formal method for modeling and checking an enhanced version of the carrier sense multiple access with collision avoidance protocol related to the IEEE 802.11 MAC layer, which has been proposed as the standard protocol for wireless local area networks. We deal mainly with the distributed coordination function (DCF) procedure of this protocol throughout a sequence of transformation steps. First, we use the unified modeling language state machines to thoroughly capture the behavior of wireless stations implementing a DCF, and then translate them into the input language of the UPPAAL model checking tool, which is a network of communicating timed automata. Finally, we proceed by checking of some of the safety and liveness properties, such as deadlock-freedom, using this tool.

• JSTS:Journal of Semiconductor Technology and Science
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• v.2 no.2
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• pp.132-140
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• 2002

This paper presents an ARM-based SOC bus transaction verification IP and the usage experiences in SOC designs. The verification IP is an AMBA AHB protocol checker, which captures legal AHB transactions in FSM-style signal sequence checking routines. This checker can be considered as a reusable verification IP since it does not change unless the bus protocol changes. Our AHB protocol checker is designed to be scalable to any number of AHB masters and reusable for various AMBA-based SOC designs. The keys to the scalability and the reusability are Object-Oriented Programming (OOP), virtual port, and bind operation. This paper describes how OOP, virtual port, and bind features are used to implement AHB protocol checker. Using the AHB protocol checker, an AHB simulation monitor is constructed. The monitor checks the legal bus arbitration and detects the first cycle of an AHB transaction. Then it calls AHB protocol checker to check the expected AHB signal sequences. We integrate the AHB bus monitor into Verilog simulation environment to replace time-consuming visual waveform inspection, and it allows us to find design bugs quickly. This paper also discusses AMBA AHB bus transaction coverage metrics and AHB transaction coverage analysis. Test programs for five AHB masters of an SOC, four channel DMAs and a host interface unit are executed and transaction coverage for DMA verification is collected during simulation. These coverage results can be used to determine the weak point of test programs in terms of the number of bus transactions occurred and guide to improve the quality of the test programs. Also, the coverage results can be used to obtain bus utilization statistics since the bus cycles occupied by each AHB master can be obtained.

• The Journal of Korean Institute for Practical Engineering Education
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• v.4 no.1
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• pp.30-44
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• 2012

The purposes of this study were to develop Korean version of the Kolb learning Style Inventory (version 3.1) by systematic translation process and to test learning style of 596 K University-students. First, Korean version of LSI was successfully developed and tested for ensuring internal consistency reliability and internal validity. Second, K University students' average scores of learning modes were as follows: 27.75 of Concrete Experience(CE), 27.93 of Reflective Observation(RO), Abstract 31,95 of Conceptualization (AC), and 32.37 of Active Experimentation(AE). In addition, the study reported KUT students learning style distribution: 32% of accommodating style, 27.2% of Diverging one, 26.5% of Assimilating one, and 14.3% of Converging one.

• Journal of Korean Society for Geospatial Information Science
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• v.25 no.1
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• pp.19-27
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• 2017

This research was aimed to analyze landslide susceptibility and compare the prediction accuracy using ensemble frequency ratio (FR) and logistic regression at the Inje area, Korea. The landslide locations were identified with the before and after aerial photographs of landslide occurrence that were randomly selected for training (70%) and validation (30%). The total twelve landslide-related factors were elevation, slope, aspect, distance to drainage, topographic wetness index, stream power index, soil texture, soil sickness, timber age, timber diameter, timber density, and timber type. The spatial relationship between landslide occurrence and landslide-related factors was analyzed using FR and ensemble model. The produced LSI maps were validated and compared using relative operating characteristics (ROC) curve. The prediction accuracy of produced ensemble LSI map was about 2% higher than FR LSI map. The LSI map produced in this research could be used to establish land use planning and mitigate the damages caused by disaster.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.9 s.339
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• pp.1-8
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• 2005

A $0.35\mu$m SiGe BiCMOS fabrication process has been timely developed, which is aiming at wireless RF ICs development and fast growing SiGe RF market. With non-selective SiGe epilayer, SiGe HBTs in this process used trapezoidal Ge base profile for the enhanced AC performance via Ge induced bandgap niuoin. The characteristics of hFE 100, $f_{T}\;45GHz,\;F_{max}\;50GHz,\;NF_{min}\;0.8dB$ have been obtained by optimizing not only SiGe base profile but also RTA condition after emitter polysilicon deposition, which enables the SiGe technology competition against the worldwide cutting edge SiGe BiCMOS technology. In addition, the process incorporates the CMOS logic, which is fully compatible with $0.35\mu$m pure logic technology. High Q passive elements are also provided for high precision analog circuit designs, and their quality factors of W(1pF) and inductor(2nH) are 80, 12.5, respectively.

• Bulletin of the Korean Chemical Society
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• v.34 no.9
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• pp.2563-2564
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• 2013

• Journal of Korean Institute of Industrial Engineers
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• v.29 no.2
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• pp.179-189
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• 2003

Gate poly-silicon critical dimension is a prime characteristic of a metal-oxide-semiconductor field effect transistor. It is important to achieve the uniformity of gate poly-silicon critical dimension in order that a semiconductor device has acceptable electrical test characteristics as well as a semiconductor wafer fabrication process has a competitive net-die-per-wafer yield. However, on gate poly-silicon critical dimension, the complexity associated with a semiconductor wafer fabrication process entails hierarchical variance components according to run-to-run, wafer-to-wafer and even die-to-die production unit changes. Specifically, estimates of the hierarchical variance components are required not only for disclosing dominant sources of the variation but also for testing the wafer-level uniformity. In this paper, two experimental designs, a two-stage nested design and a randomized complete block design are considered in order to estimate the hierarchical variance components. Since gate poly-silicon critical dimensions are collected from fixed die positions within wafers, a factor representing die positions can be regarded as fixed in linear statistical models for the designs. In this context, the two-stage nested design also checks the wafer-level uniformity taking all sampled runs into account. In more detail, using variance estimates derived from randomized complete block designs, Duncan's multiple range test examines the wafer-level uniformity for each run. Consequently, a framework presented in this study could provide guidelines to practitioners on estimating the hierarchical variance components and testing the wafer-level uniformity in parallel for any characteristics concerned in semiconductor wafer fabrication processes. Statistical analysis is illustrated for an experimental dataset from a real pilot semiconductor wafer fabrication process.

• Transactions of the Society of Information Storage Systems
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• v.2 no.4
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• pp.224-229
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• 2006

There has been studied flow to minimize the spot size to increase data capacity. Optical data storage devices are being developed near practical limits with wavelength and NA of 405nm and 0.85. There has been studied many types of next generation storage devices such as blu-ray multilayer system, probe based data storage and holographic data storage. Among these data storage devices, solid immersion lens(SIL) based near field recording (NFR) has been widely studied. In this system, SIL is the key component that focuses the laser beam with a very small size which enables ultra high data capacity. Therefore, optical performance evaluation system is required for SIL assembly. In this dissertation, a simple and accurate SIL assembly measurement method is proposed with wedge plate lateral shearing interferometer(LSI). Wedge plate LSI is cheaper than commercialized interferometer, robust to the vibration and the moving distance for phase shifting is large that is order of micrometer. We designed the thickness, wedge angle, material, surface quality and wavelength of wedge plate as 1mm, 0.02degree, fused silica, lamda/10(10-5) and 405nm, respectively. Also, we confirmed simulation and experimental results with quantitative analysis. This simple wedge plate LSI can be applied to different types of SIL such as solid immersion mirror(SIM), hemispherical, super-hemispherical and elliptical SIL.

• Journal of Environmental Health Sciences
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• v.29 no.2
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• pp.1-6
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• 2003

This paper reports on a pilot scale comparison of PACS coagulation with and without pH preadjustment. The pH of the water was adjusted with carbon dioxide and sulfuric acid. Process performance was assessed on the basis of total organic carbon(TOC), UV absorbance, turbidity and disinfection by-product(DBP) precursors. Coagulation pH appeared to be a determining factor for maximum NOM removal. The optimum coagulation pH in order to decrease TOC and turbidity were pH 7. Preadjustment of pH 7 increased TOC removal to as much as 43, 47 percent with sulfuric acid and carbon dioxide. Moreover, coagulation at pH 7 caused a reduction in UV$_{254}$, THMFP and HAAFP compared to the baseline coagulation. For preadjustment of pH 7 with carbon dioxide, the percentage of TOC, UV$_{254}$, THMFP and HAAFP shows the reduction rate of 3.8, 0.5, 4.8, 9.4％ comparing to the coagulation rendition using sulfuric acid. Acid addition to depress pH during coagulation decrease Langelier Saturation Index(LSI), potentially causing increase corrosion in water distribution systems. LSI for carbon dioxide and sulfuric acid at pH 6 was -2.3, -3.3. Therefore, carbon dioxide was more effective at controlling corrosion than sulfuric acid.