• Proceedings of the KIEE Conference
• /
• 1999.07f
• /
• pp.2568-2571
• /
• 1999

Recently, new trend in telecommunication device is to apply low voltage, about 3.3V-1.5V. However, it is undesirable in view of high efficiency and power desity which is the most important requirement in the distributed power system. Rectification loss in the output stage in on-board converter for distributed power system are constrained to obtain high efficience at low output voltage power suppies. This paper is investigated conduction power loss in synchronouss rectifier with a parallel -connected Schottky Barrier Diode(SBD). Conduction losses are calculated for both MOSFET and SBD respectively. The SBD conduction power loss dissipates more than the MOSFET rectifier conduction power loss.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.25 no.6
• /
• pp.490-495
• /
• 2020

The power loss of large-capacity systems using single-phase inverters has attracted considerable attention. In this study, optimal switching sequence model prediction control at a low switching frequency is proposed to reduce the power loss in a high-power inverter system, and a compensation method that can be utilized for model prediction control is developed to reduce errors in accordance with sampling values. When a three-level, single-phase inverter using a switching frequency of 600 Hz and a sampling frequency of 12 kHz is adopted, the power factor is improved from 0.95 to 0.99 through 3 kW active power control. The performance of the controller is also verified.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.28 no.2
• /
• pp.69-74
• /
• 2015

Recently, energy harvesting technology is increasing due to the fossil fuel shortages. Energy harvesting is generating electrical energy from wasted energies as sunlight, wind, waves, pressure, and vibration etc. Energy harvesting is one of the alternatives of fossil fuel. One of the energy harvesting technologies, the piezoelectric energy harvesting has been actively studied. Piezoelectric generating uses a positive piezoelectric effect which produces electrical energy when mechanical vibration is applied to the piezoelectric device. Piezoelectric energy harvesting has an advantage in that it is relatively not affected by weather, area and place. Also, stable and sustainable energy generation is possible. However, the output power is relatively low, so in this paper, newly designed honeycomb shaped piezoelectric energy harvesting device for increasing a generating efficiency. The output characteristics of the piezoelectric harvesting device were analyzed according to the change of parameters by using the finite element method analysis program. One model which has high output voltage was selected and a prototype of the honeycomb shaped piezoelectric harvesting device was fabricated. Experimental results from the fabricated device were compared to the analyzed results. After the AC-DC converting, the power of one honeycomb shaped piezoelectric energy harvesting device was measured 2.3[mW] at road resistance 5.1[$K{\Omega}$]. And output power was increased the number of harvesting device when piezoelectric energy harvesting device were connected in series and parallel.

• Journal of Electrical Engineering and Technology
• /
• v.8 no.6
• /
• pp.1497-1502
• /
• 2013

Recently, the junctionless (JL) transistors realized by a single-type doping process have attracted attention instead of the conventional metal-oxide-semiconductor field-effect transistors (MOSFET). The JL transistor can overcome MOSFET's problems such as the thermal budget and short-channel effect. Thus, the JL transistor is considered as great alternative device for a next generation low standby power silicon system. In this paper, the JL FinFET was simulated with a three dimensional (3D) technology computer-aided design (TCAD) simulator and optimized for DC characteristics according to device dimension and doping concentration. The design variables were the fin width ($W_{fin}$), fin height ($H_{fin}$), and doping concentration ($D_{ch}$). After the optimization of DC characteristics, RF characteristics of JL FinFET were also extracted.

• Proceedings of the KIPE Conference
• /
• 2005.07a
• /
• pp.93-95
• /
• 2005

A new energy-recovery- sustain circuit suitable for a Plasma Display Panel(PDP) application is proposed. The proposed circuit features the low device voltage stresses, essential to design a power efficient and low cost PDP driver circuit. The proposed circuit is demonstrated experimentally for driving a 42 inches plasma display panel.

• Progress in Superconductivity and Cryogenics
• /
• v.8 no.1
• /
• pp.26-28
• /
• 2006

The development technique of digital logic using CMOS device is close reached several limitations These make technical needs that are ultra high speed superconductive systems based on CMOS silicon digital computing technique. Comparing digital logic based on silicon CMOS, the computing technique based on ultra high speed superconductive systems has many advantages which are ultra low power consumption, ultra high operation speed. etc. It is estimated that features like these increasingly improve the possibility of ultra low power and ultra superconductive systems. In this paper digital logics of current CMOS technique and RSFQ superconductive technique are compared with and analyzed.

• Proceedings of the Korea Information Processing Society Conference
• /
• 2016.04a
• /
• pp.897-899
• /
• 2016

In recent years, BLE technology has received extensive attention and has been applied to all aspects of life. The existing BLE device has two methods, one is the connection method, and the other is a non-connection method. The representative profile of the connection method is the proximity file. The most typical example of Non-connection method BLE device is a beacon. However, they are both independent and have their own shortcomings. Connection method device can provide service for only one user, others can't use. Security performance of Non-connection method BLE device is poor and the device can't be controlled by the user. In this paper, a combination-mode BLE device profile design scheme is presented, which combines with the previous two methods, and solves the defaults. And We define a dual purpose advertising package that can be used in a normal environment as well as in a disaster environment. Finally, a unidirectional Control idea is proposed. Through performance evaluation, we found that the device has strong stability and low power consumption.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.28 no.8
• /
• pp.486-489
• /
• 2015

Power semiconductor device has a very long history among semiconductor, since the invention of low-pressure bipolar transistor 1947, and so far from small capacity to withstand voltage-current, high-speed and high-frequency characteristics have been developed with high function. In this study, the PWM IC Switch to the main parts used in IGBT (insulated gate bipolar transistor) for the low power loss and high drive capability of the simulator to Synopsys' T-CAD used by the 1,700 V NPT Planar IGBT, 1,700 V FS was a study of the Planar IGBT, the results confirmed that IGBT 1,700 V FS Planar is making about 11 percent less than the first designed NPT Planar IGBT.

• The Transactions of The Korean Institute of Electrical Engineers
• /
• v.60 no.7
• /
• pp.1385-1390
• /
• 2011

A coaxial-conical-radial transmission line conversion circuits have been investigated to realize a low loss high performance microwave power divider/combiner. In order to optimize the characteristics of the device, the power divider/combiner was designed separately with two parts-the inner part and the outer part. Utilizing the rectangular approximation of the outer part, we can design the low loss device which is not affected by the partition number N of the outer part. The small return loss which is lower than 20dB was obtained on the frequency range of 5.15GHz(7.45~12.60GHz). A conical connector was employed for smooth connection between the central coaxial line and the outer radial line. Making use of the $47^{\circ}$ and $90^{\circ}$ 2-stage conical connector, the return loss lower than 30dB was obtained on the operating frequency range of 5GHz. The total return loss of the designed divider/combiner was lower than 20dB on the frequency range of 5GHz for the partition number N=11, N=12 and N=16.

• Proceedings of the IEEK Conference
• /
• 2005.11a
• /
• pp.731-734
• /
• 2005

In this study, the design of advanced LVDS(Low Voltage Differential Signaling) I/O interface circuit with new structural low triggering ESD (Electro-Static Discharge) protection circuit was investigated. Due to the differential transmission technique and low power consumption at the same time. Maximum transmission data ratio of designed LVDS transmitter was simulated to 5Gbps. And Zener Triggered SCR devices to protect the ESD phenomenon were designed. This structure reduces the trigger voltage by making the zener junction between the lateral PNP and base of lateral NPN in SCR structure. The triggering voltage was simulated to 5.8V. Finally, we performed the layout high speed I/O interface circuit with the low triggered ESD protection device in one-chip.