1 |
Hong Xiao, Introduction to Semiconductor Manufacturing Technology, Prentice Hall, New Jersey, 2001, pp. 150-157.
|
2 |
Chenming Hu, "Device challenges and opportunities," in Proceeding of 2004 VLSI Symp. Tech. Dig, Hsinchu, Taiwan, June 2004.
|
3 |
Yuan Taur and Tak H. Ning, Fundamentals of Modern VLSI Devices, Cambridge University Press, New York, 1998, pp. 164-167.
|
4 |
Yiming Li, Chih-Hong Hwang, Tien-Yeh Li, Ming-Hung Han, "Process-Variation Effect, Metal-Gate Work-Function Fluctuation, and Random-Dopant Fluctuation in Emerging CMOS Technologies," IEEE Trans. on Electron Devices, Vol. 57, No. 2, pp.437-447, Fab. 2010.
DOI
ScienceOn
|
5 |
Jean-Pierre Colinge, Chi-Woo Lee, Aryan Afzalian, Nima Dehdashti Akhavan, Ran Yan, Isabelle Ferain, Pedram Razavi, Brendan O'Neill, Alan Blake, Mary White, Anne-Marie Kelleher, Brendan McCarthy and Richard Murphy, "Nanowire transistors without junctions," Nature Nanotechnology, Vol. 5, No. 3, pp. 225-229, Mar. 2010.
DOI
ScienceOn
|
6 |
Chi-Woo Lee, Aryan Afzalian, Nima Dehdashti Akhavan, Ran Yan, Isabelle Ferain, and Jean-Pierre Colinge, "Junctionless multigate field-effect transistor," Appl. Phys. Lett., Vol. 94, 053511, 2009.
DOI
ScienceOn
|
7 |
Chi-Woo Lee, Adrien Borne, Isabelle Ferain, Aryan Afzalian, Ran Yan, Nima Dehdashti Akhavan, Pedram Razavi, and Jean-Pierre Colinge, "High-Temperature Performance of Silicon Junctionless MOSFETs," IEEE Trans. on Electron Devices, Vol. 57, No. 3, pp. 620-625, Mar. 2010.
DOI
ScienceOn
|
8 |
Rodrigo Trevisoli Doria, Marcelo Antonio Pavanello, Renan Doria Trevisoli, Michelly de Souza, Chi-Woo Lee, Isabelle Ferain, Nima Dehdashti Akhavan, Ran Yan, Pedram Razavi, Ran Yu, Abhinav Kranti, and Jean-Pierre Colinge, "Junctionless Multiple-Gate Transistors for Analog Applications," IEEE Trans. on Electron Devices, Vol. 58, No. 8, pp. 2511-2519, Aug. 2011.
DOI
ScienceOn
|
9 |
Chi-Woo Lee, Alexei N. Nazarov, Isabelle Ferain, Nima Dehdashti Akhavan, Ran Yan, Pedram Razavi, Ran Yu, Rodrigo T. Doria, and Jean-Pierre Colinge, "Low subthreshold slope in junctionless multigate transistors," Appl. Phys. Lett., Vol. 96, 102106, 2010.
DOI
ScienceOn
|
10 |
Lida Ansari, Baruch Feldman, Giorgos Fagas, Jean-Pierre Colinge, and James C. Greer, "Simulation of junctionless Si nanowire transistors with 3 nm gate length," Appl. Phys. Lett., Vol. 97, 062105, 2010.
DOI
ScienceOn
|
11 |
Chi-Woo Lee, Aryan Afzalian, Nima Dehdashti Akhavan, Ran Yan, Isabelle Ferain, and Jean-Pierre Colinge, "Junctionless multigate field-effect transistor," Appl. Phys. Lett., Vol. 94, 053511, 2009.
DOI
ScienceOn
|
12 |
SILVACO International, ATLAS User's Manual 2012
|
13 |
2012 International Technology Roadmap for Semiconductors (ITRS), Online Link available at http://www.itrs.net/Links/2012ITRS/Home2012.htm
|
14 |
J.-P. Colinge, Silicon-On-Insulator Technology : Materials to VLSI, Springer, New York, 2004.
|
15 |
Ben Streetman and Sanjay Banerjee, Solid State Electronic Devices, Prentice Hall, New York, 2006, pp. 144-315.
|
16 |
Y. Tsividis, Operation and Modeling of the MOS Transistor, Oxford Univ. Press, New York, 1999, pp. 467-491.
|