• 전기전자학회논문지
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• 제10권2호통권19호
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• pp.149-155
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• 2006

In this study, the design of low voltage DC-DC converter with low triggering ESD (Electro-Static Discharge) protection circuit was investigated. The purpose of this paper is design optimization for low voltage(2.5V to 5.5V input range) DC-DC converter using CMOS switch. In CMOS switch environment, a dominant loss component is not switching loss but conduction loss at 1.2MHz switching frequency. In this study a constant frequency PWM converter with synchronous rectifier is used. And zener Triggered SCR device to protect the ESD phenomenon was designed. This structure reduces the trigger voltage by making the zener junction between the lateral PNP and base of lateral NPN in SCR structure. The triggering voltage was simulated to 8V.

• 전력전자학회논문지
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• 제24권4호
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• pp.229-236
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• 2019

This study proposes a DC-DC converter topology of solid-state transformer for low-voltage DC distribution. The proposed topology consists of a voltage balancer and bipolar DC-DC converter. The voltage and current equations are obtained on the basis of switching states to design the controller. The open-loop gain of the controller is achieved using the derived voltage and current equations. The controller gain is selected through the frequency analysis of the loop gain. The inductance and capacitance are calculated considering the voltage and current ripples. The prototype is fabricated in accordance with the designed system parameters. The proposed topology and designed controller are verified through simulation and experiment.

• 한국정보통신학회:학술대회논문집
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• 한국정보통신학회 2012년도 추계학술대회
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• pp.852-855
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• 2012

본 논문에서는 FN(Fowler-Nordheim) 터널링 방식에 의한 program 동작과 band-to-band 터널링 방식에 의한 erase 동작을 수행하는 EEPROM IP용 DC-DC converter를 설계하였다. 로직전압으로 $1.5V{\pm}10%$의 저전압을 사용하는 EEPROM IP용 DC-DC converter는 charge pump 회로의 pumping stage 수와 pumping capacitance를 줄이기 위해 입력 전압으로 VDD 대신 VRD(Read Voltage)을 전압을 사용하는 방식을 제안하였다. VRD($=3.1V{\pm}0.1V$)는 5V의 external supply voltage를 voltage regulator 회로를 이용하여 regulation된 전압이다. 설계된 DC-DC converter는 write 모드에서 VPP(=8V)와 VNN(=-8V)의 전압을 출력한다.

• Journal of Power Electronics
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• 제6권1호
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• pp.83-93
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• 2006

A new high efficiency and low profile on-board DC/DC converter for digital car audio amplifiers is proposed. The proposed converter shows low conduction loss due to the low voltage stress of the secondary diodes, a lack of DC magnetizing current for the transformer, and a lack of stored energy in the transformer. Moreover, since the primary MOSFETs are turned-on under zero-voltage-switching (ZVS) conditions and the secondary diodes are turned-off under zero-current-switching (ZCS) conditions, the proposed converter has minimized switching losses. In addition, the input filter can be minimized due to a continuous input current, and an output inductor is absent in the proposed converter. Therefore, the proposed converter has the desired features, high efficiency and low profile, for a viable power supply for digital car audio amplifiers. A 60W industrial sample of the proposed converter has been implemented for digital car audio amplifiers with a measured efficiency of $88.3\%$ at nominal input voltage.

• 대한전기학회논문지:전기기기및에너지변환시스템부문B
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• 제54권12호
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• pp.616-621
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• 2005

We considered of the buck and half bridge series DC-DC converter. It has good applications in areas with low voltage/high current, wide input voltage. The buck converter ratings and the half bridge converter ratings are $36\~72V$ input and 22V/5A output, $19\~24V$ input and 3.3V/30A output, respectively. Developed the buck and half Bridge series DC-DC converter ratings are of $36\~72V$ input and 3.3V/30A output. The buck converter is operated with zero voltage switching process to reduce the switching losses. The $80.1\%\~97.6\%$ of the efficiency is measured at $18.4{\mu}H$ output filter inductance of buck converter. In the half bridge converter, the $86\%\~96.4\%$ efficiency is measured at 150kHz switching frequency with PQI core. In the case of synchronized the buck and half bridge DC-DC converter, the measured efficiency is higher than that of the unsynchronized converter. In the synchronized converter, the maximum efficiency is measured up to $92.3\%$ with PQI core at 150kHz. 7A output.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2008년도 제39회 하계학술대회
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• pp.1146-1147
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• 2008

PV Power Conditioning System (PCS) must have high conversion and low cost. Generally, PV PCS uses either a single converter or multilevel module integrated converter (MIC). Each of these approaches has both advantage and disadvantage. For a high conversion efficiency and low cost of PV module, this paper proposes series connection of module integrated DC-DC converter's output with PV panel. Output voltage of PV panel is connected to the output capacitor of flyback converter. Thus, converter's output voltage is added to the output voltage of PV panel. Isolated DC-DC converter generates only the difference voltage between the PV panel voltage and the required total output voltage. This method reduces power level of DC-DC converter and enhances the energy conversion efficiency compared with conventional DC-DC converter.

• 공학기술논문지
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• 제5권4호
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• pp.349-353
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• 2012

Recently, Mobile multimedia equipments as smart phone and tablet pc requirement is increasing and this market is also being expanded. These mobile equipments require large multi-media function, so more power consumption is required. For these reasons, the needs of power management IC as switching type dc-dc converter and linear regulator have increased. DC-DC buck converter become more important in power management IC because the operating voltage of VLSI system is very low comparing to lithium-ion battery voltage. There are many people to be concerned about digital DC-DC converter without using external passive device recently. Digital controlled DC-DC converter is essential in mobile application to various external circumstance. This paper proposes the DC-DC Buck Converter using the AVR RISC 8-bit micro-processor control. The designed converter receives the input DC 18-30 [V] and the output voltage of DC-DC Converter changes by the feedback circuit using the A/D conversion function. Duty ratio is adjusted to maintain a constant output voltage 12 [V]. Proposed converter using the micro-processor control was compared to a typical boost converter. As a result, the current loss in the proposed converter was reduced about 10.7%. Input voltage and output voltage can be displayed on the LCD display to see the status of the operation.

• 대한전자공학회논문지SD
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• 제45권6호
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• pp.1-9
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• 2008

본 논문에서는 temperature/voltage에 둔감한 triple-mode CMOS DC-DC Converter를 제안한다. 제안된 triple-mode DC-DC converter는 단일 배터리의 수명에 따른 전압변화(3.3-5.5V)로부터 일정 또는 다양한 출력전압(0.6-2.2V)을 생성한다. 제안된 triple-mode CMOS DC-DC converter는 Pulse Width Modulator(PWM) 모드, Pulse Frequency Modulator(PPM) 모드, 그리고 Low Drop-Out(LDO) 모드, 이렇게 세 가지 모드로 동작한다. 또한, 제안된 회로는 temperature/voltage 변화에 의한 칩의 오동작을 방지하기 위해 temperature/voltage 변화에 둔감한 저 전력 1MHz CMOS ring oscillator를 사용한다. 제안된 triple-mode DC-DC converter는 단일 입력 전원소스(3.3-5.5V)에서 출력 전압(0.6-2.2V)을 생성하며, 출력 전압 ripple은 PWM mode에서 10mv, PFM mode에서 15mV, 그리고 LDO mode에서는 4mV 이하이다. 또한, 제안된 회로의 효율은 PWM mode에서 93% 이상이며, $-25-80^{\circ}C$의 온도변화에도 각 모드에서의 출력 전압 레벨의 오차는 단지 0.8% 이하로 유지한다 제안된 회로의 검증을 위해 CMOS $0.35{\mu}m$ 공정을 이용한 시뮬레이션 및 칩 테스트를 수행하였다.

• Journal of Power Electronics
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• 제9권3호
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• pp.396-402
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• 2009

A DC/DC converter generally needs to work under high switching frequency when used as an adjustable power supply to reduce the size of magnetic elements such as inductors, transformers and capacitors, but with the rising of the switch frequency, the switch losses will increase and the efficiency will reduce. Recently, to solve these problems, research is actively being done on a soft switching method that can be applied under high frequency and on a PWM converter that can be applied under low frequency such as a multi-level topology. In this paper a novel DC-DC conversion method for reducing the ripple of output voltage is proposed. In the proposed converter, buck converters are connected in series to generate the output voltage. By using this method, the ripple of output voltage can be reduced compared to a conventional buck converter. Particularly when output voltage is low, the number of acting switching elements is less and the result of ripple reduction is more obvious. It is expected that the converter proposed in this paper could be very useful in the case of wide-range output voltage.

• 전력전자학회논문지
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• 제25권2호
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• pp.133-141
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• 2020

The use of high-gain-voltage step-up converters for distributed power generation systems is being popularized because of the need for new energy generation and power conversion technologies. In this study, a new constructed high-gain-boost DC-DC converter was proposed to coordinate low voltage output DC sources, such as PV or fuel cell systems, with high DC bus (380 V) lines. Compared with traditional boost DC-DC converters, the proposed converter can create higher gain and has wider input voltage range and lower voltage stress for power semiconductors and passive elements. Moreover, the proposed topology produces multilevel DC voltage output, which is the main advantage of the proposed topology. Steady-state analysis in continuous conduction mode of the proposed converter is discussed in detail. The practicability of the proposed DC-DC converter is presented by experimental results with a 300 W prototype converter.