• Proceedings of the KIEE Conference
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• 1994.11a
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• pp.83-85
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• 1994

This paper describes the dual mode control of the LDM(Linear DC motor) for carrier. The dual mode control consists of seek and analogue control. In seek mode, LDM is moved in the shortest time by switching line, and in analogue mode keeps at origion with high accuracy. We proposed different switching line method according to driving direction.

• Proceedings of the KIEE Conference
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• 1995.07a
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• pp.74-76
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• 1995

This paper describes the precise position control of the linear DC motor for carrier. We analyze the switching line of seek mode control and propose the modified switching line according to the mass and distance. Experimental results demonstrate that good performance is achieved by the proposed controller.

• Industrial Engineering and Management Systems
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• v.11 no.1
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• pp.48-53
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• 2012

Due to the customer needs of reducing cost and delivery date shorting, prompt change in the production plan became more important. In the multi period system (For instance, production line.) where target processing time exists, production, idle and delay risks occur repeatedly for multiple periods. In such situations, delay of one process may influence the delivery date of an entire process. In this paper, we discuss the minimum expected cost of the case mentioned above, where the risk depends on the previous situation and occurs repeatedly for multiple periods. This paper considers the optimal switching frequency to minimize the total expected cost of the production process. In this paper, first, the optimal switching frequency model is proposed. Next, the mathematic formulation of the total expectation is presented. Finally, the policy of optimal switching frequency is investigated by numerical experiments.

• Journal of Institute of Control, Robotics and Systems
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• v.15 no.10
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• pp.982-987
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• 2009

On the controller switching time, even though on-line/off-line controller outputs are the same, a problem which deteriorates the performance of bumpless transfer can happen in case that any discrepancy between the two controller inputs is transferred directly to the controller output. In this paper, we analyze the cause of that phenomenon in existing research results and propose a new method which improves that problem. In order to solve this problem, the off-line controller is augmented to an anti-windup structure and an improved bumpless transfer method is derived by using the changed input of the off-line controller instead of the plant input. We exemplify the performance of the proposed method by comparing with the performance of the existing method via numerical examples.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.7
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• pp.11-19
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• 1998

A signal line potential variation due to the delta-I noise was physically investigated in CMOS integrated circuits. An equivalent circuit for the noise analysis was presented. The signal line was modeled as segmented RC-lumped circuits with the ground noise. Then the equivalent circuit was mathematically analyzed. Therebvy a new signal line potential variation model due to the switching mosie was developed. Th emodel was verified with 0.35.mu.m CMOS deivce model parameters. The model has an excellent agreement with HSPICE simulation. Thus the proposed model can be dirctly employed in the industry to design the high-performance integrted circuit design as well as integrated circuit package design.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.26 no.3
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• pp.61-68
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• 2012

This paper deals with a fault diagnosis algorithm for open faults in the switching devices of PWM inverter-fed IPMSM (Interior Permanent Magnet Synchronous Motor) drive. The proposed diagnostic algorithm is realized in the controller using the informations of three-phase currents or reference line-to-line voltages, without requiring additional equipments for fault detection. Under switch open fault conditions, the conventional dq model used to control an AC motor cannot directly be applied for the analysis of drive system, since three-phase balanced condition does not hold. To overcome this limitation, a fault model based on the line-to-line voltages is employed for the simulation studies. For comparative performance evaluation through the experiments, the entire control system is implemented using digital signal processor (DSP) TMS320F28335. Simulations and experimental results are presented to verify the validity of the proposed diagnosis algorithm.

• IMMUNE NETWORK
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• v.4 no.4
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• pp.216-223
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• 2004

Background: It is well known that IgA isotype switching is induced by $TGF-{\beta}1$. LPS-activated mouse normal B cells well differentiate into IgA secreting plasma cells under the influence of $TGF-{\beta}1$. Nevertheless, there are lots of difficulties in studying normal B cells in detail because it is not simple to obtain highly purified B cells, showing low reproducibility and transfection efficacy, moreover impossible to keep continuous culture. To overcome these obstacles, it is desperately needed to develop B cell line which acts like normal B cells. In the present study, we investigated whether CH12F3-2A lymphoma cells are appropriate for studying IgA isotype switching event. Methods: CH12F3-2A B cell line was treated with LPS and $TGF-{\beta}1$, then levels of germ-line (GL) transcripts were measured by RT-PCR, and $GL{\alpha}$ promoter activity was measured by luciferase assay. In addition, membrane IgA (mIgA) expression and IgA secretion were determined by FACS and ELISA, respectively. Results: $TGF-{\beta}1$, regardless of the presence of LPS, increased level of $GL{\alpha}$ transcripts but not $GL{\gamma}2b$ transcripts. However, IgA secretion was increased dramatically by co-stimulation of LPS and $TGF-{\beta}1$. Both mIgA and IgA secretion in the presence of $TGF-{\beta}1$ were further increased by over-expression of Smad3/4. Finally, $GL{\alpha}$ promoter activity was increased by $TGF-{\beta}1$. Conclusion: CH12F3-2A cell line acts quite similarly to the normal B cells which have been previously reported regarding IgA expression. Thus, CH12F3-2A lymphoma cell line appears to be adequate for the investigation of the mechanism(s) of IgA isotype switching at the cellular and molecular levels.

• The KIPS Transactions:PartC
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• v.8C no.6
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• pp.793-805
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• 2001

In the recent priority system, high-priority packet will be served first and low-priority packet will be served when there isn\`t any high-priority packet in the system. By the way, even high-priority packet can be blocked by HOL (Head of Line) contention in the input queueing System. Therefore, the whole switching performance can be improved by serving low-priority packet even though high-priority packet is blocked. In this paper, we study the performance of preemptive priority in an input queueing switch for high speed switch system. The analysis of this switching system is taken into account of the influence of priority scheduling and the window scheme for head-of-line contention. We derive queue length distribution, delay and maximum throughput for the switching system based on these control schemes. Because of the service dependencies between inputs, an exact analysis of this switching system is intractable. Consequently, we provide an approximate analysis based on some independence assumption and the flow conservation rule. We use an equivalent queueing system to estimate the service capability seen by each input. In case of the preemptive priority policy without considering a window scheme, we extend the approximation technique used by Chen and Guerin [1] to obtain more accurate results. Moreover, we also propose newly a window scheme that is appropriate for the preemptive priority switching system in view of implementation and operation. It can improve the total system throughput and delay performance of low priority packets. We also analyze this window scheme using an equivalent queueing system and compare the performance results with that without the window scheme. Numerical results are compared with simulations.

• Proceedings of the IEEK Conference
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• 2004.06b
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• pp.439-442
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• 2004

Timing delays due to VLSI circuit interconnects strongly depend on neighbor line switching patterns as well as input transition time. Considering both the input transition and input switching pattern, a new analytical timing delay model is developed by using the decoupling technique of transfer multi-coupled lines into an effective single line. The analytical timing delay model can determine the timing delay of multi-coupled lines accurately as well as rapidly. It is verified by using DSM-Technology ($0.1{\mu}m$ /low-k copper-based process) that the model has excellent agreement with the results of SPICE simulation.

• Proceedings of the KIPE Conference
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• 2001.12a
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• pp.129-132
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• 2001

Recently, a ZVT boost converter is embedded in a power factor correction system. The control circuit of the converter assures soft-switching for all the MOSFETs and load regulation. The PFC system contains additional control circuits which assure the input voltage in a sinusoidal form and feed-forward line voltage regulation. In this paper, a soft switching boost converter with zero-voltage transition(ZVT) main switch using zero-current switching(ZCS) auxiliary switch is proposed. Operating intervals of the converter are persented and analyzed. The proposed results show that the main switch maintains UT while auxiliary switch retains ZCS for the complete specified line and load conditions.