• Title/Summary/Keyword: Layout Design

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Analysis of User Preferences in the Use of E-book Readers: Feature-Setting Options and Touchscreen Actions in a Smartphone Environment (스마트폰 환경에서 전자책 리더 기능 설정 옵션 및 터치스크린 동작 사용에 관한 사용자 선호도 분석)

  • Kim, Mihye
    • The Journal of the Korea Contents Association
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    • v.14 no.9
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    • pp.141-152
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    • 2014
  • The user interfaces of electronic-book (e-book) readers in the e-book market are highly diverse, and this has led to major usability issues. In this paper, we analyze user preferences in terms of feature-setting options and the use of touchscreen actions in the six most commonly used e-book readers for smartphnoes. We identify alternatives for these features, which can enhance the usability of e-book readers, based on these user preferences. The survey results for the feature-setting options show that it is desirable to support at least eight background colors, as well as the ability to specify the color of the background icons. Adjusting the screen brightness using a setting bar with the support of an auto-brightness option is desirable, as in using +/- buttons to adjust the font size, as well as approximately 10 font faces. We find that it is desirable to support fade, slide, scroll and curl page-turing options, in addition to a simple non-animated page-turning effect, and that page movement should be accomplished using a scroll bar with the support of the page movement features by entering a page number, and by using the table of contents as well as bookmarks. The survey results on the use of touchscreen options indicated that it is useful to be able to configure the screen layout of an e-book reader by dividing it into three areas: left, right, and center. And then, when users briefly touch the left and right areas, it is ideal to move to the previous and subsequent pages, respectively; and when they briefly touch the center region, it is desirable to display a touch feature menu. We believe that the results of this study may provide guidance in the design of user interfaces for e-book readers.

A Study on the Satisfaction Factors of the Attendees to the Overseas Exhibitions (해외전시회에서 참관객 만족요인에 관한 연구)

  • Lee, Tae-Hee
    • International Commerce and Information Review
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    • v.8 no.1
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    • pp.283-303
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    • 2006
  • This is the research on the correlation between the marketing activities conducted by the companies participating in the overseas exhibitions in the exhibition and the satisfaction of the visitors. I have been able to obtain the following findings through the positive research on the satisfaction of the visitors to the overseas exhibitions. The research findings show that the external elements of the participating companies such as 'external appearances of booths, interior facilities and the atmosphere', 'designs of exhibits', 'size of the participating companies', and the publicity elements of the participating companies such as 'the degree of application of mass media', 'prior publicity of the participating companies', etc. among the marketing activities conducted by the participating companies in the exhibition affect the interest and repeat business deals of the visitors. The findings also show that the elements to induce the interest of the visitors such as the booth design and display of products where the participating companies may produce their unique image and the prior publicity to the visitors constitute the important elements of marketing. It has also been revealed that the visitors whose purpose of the visits are to purchase the products and to satisfy their interest in 'the events and contents of the events affect the interest and the repeat business deals of the visitors, among the interest and repeat business deals pursuant to the characteristics of the visitors. It has also been found that the visitors who have recognized the representative brands in the exhibitions affect the interest and the repeat business deals and the visitors who have visited the exhibition several times are more satisfied than the visitors who have visited the exhibition for the first time. The comparative evaluation of the degree of importance of the marketing activities of the participating companies before the visitors' visit to the exhibitions and the degree of satisfaction after their visit reveals degrees of satisfaction in the order of 'the booth staff's professional knowledge of the exhibits', 'foreign language proficiency and their techniques of negotiation and demonstration', 'designs of the exhibits (colors and packaging), 'prior publicity of the participating companies. Such being the case, the companies participating in any of the overseas should maximize the result of their participation in the exhibition by training their staff in the products and foreign languages and through the prior publicity. It has also been found out that "the atmosphere of the booth in the exhibition such as 'launching of new products', 'external appearances of the booth, layout of the interior facilities and the atmosphere and events of the participating companies affect the interest and repeat business deals of the visitors, among the factors for the satisfaction of the visitors. Therefore, it has been proven that the external factors such as the external appearances of the booth, display of the products, launching of new products and events producing the atmosphere of the booth of the participating companies among the marketing activities conducted by the participating companies, and the extent of the training of the booth staff and prior publicity are the major factors affecting the interest and repeat business deals of the visitors.

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A Class-C type Wideband Current-Reuse VCO With 2-Step Auto Amplitude Calibration(AAC) Loop (2 단계 자동 진폭 캘리브레이션 기법을 적용한 넓은 튜닝 범위를 갖는 클래스-C 타입 전류 재사용 전압제어발진기 설계)

  • Kim, Dongyoung;Choi, Jinwook;Lee, Dongsoo;Lee, Kang-Yoon
    • Journal of the Institute of Electronics and Information Engineers
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    • v.51 no.11
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    • pp.94-100
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    • 2014
  • In this paper, a design of low power Current-Reuse Voltage Controlled Oscillator (VCO) which has wide tuning range about 1.95 GHz ~ 3.15 GHz is presented. Class-C type is applied to improve phase noise and 2-Step Auto Amplitude Calibration (AAC) is used for minimizing the imbalance of differential VCO output voltage which is main issue of Current-Reuse VCO. The mismatch of differential VCO output voltage is presented about 1.5mV ~ 4.5mV. This mismatch is within 0.6 % compared with VCO output voltage. Proposed Current-Reuse VCO is designed using CMOS $0.13{\mu}m$ process. Supply voltage is 1.2 V and current consumption is 2.6 mA at center frequency. The phase noise is -116.267 dBc/Hz at 2.3GHz VCO frequency at 1MHz offset. The layout size is $720{\times}580{\mu}m^2$.

The Influence of Physical Environment Service of Coffee Shops on Customer Satisfaction -Focusing on Texas Region Customers- (커피전문점의 물리적 환경이 고객 만족도와 충성도에 미치는 영향 -미국 Texas 지역 고객을 대상으로-)

  • Lee, Kwang-Woo;Kim, Hyo-Jin;Jeon, Min-Sun
    • Culinary science and hospitality research
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    • v.21 no.1
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    • pp.42-57
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    • 2015
  • When a customer chooses a coffee shop, different factors can influence his/her purchase. These factors can include tangible as well as intangible elements such as the coffee shop's atmosphere, layout, and interior. Thus, many coffee brands strive to serve not only a diverse menu, but also a unique quality of environment. This study aimed to investigate the influence of physical environment on customer satisfaction and loyalty in the coffee shop and evaluate the influential power of the physical environment factors using hierarchical regression analysis. Data was collected from customers of coffee shops in Texas, the U.S. The study found that the coffee shops' physical environment influenced the customer's satisfaction and loyalty. Particularly, the coffee shop's physical environment including ambient and interior design greatly influenced the customers' satisfaction. However, a broad range of physical environment factors such as temperature, aroma, lighting, color, and interior furnishings should be provided to increase the customer loyalty. The results may have a broader application to provide effective managerial and marketing information to Korean coffee entrepreneur brand in the U.S. and beyond.

Design of 5V NMOS-Diode eFuse OTP IP for PMICs (PMIC용 5V NMOS-Diode eFuse OTP IP 설계)

  • Kim, Moon-Hwan;Ha, Pan-Bong;Kim, Young-Hee
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.10 no.2
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    • pp.168-175
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    • 2017
  • In this paper, a 5V small-area NMOS-diode eFuse OTP memory cell is proposed. This cell which is used in PMICs consists of a 5V NMOS transistor and an eFuse link as a memory part, based on a BCD process. Also, a regulated voltage of V2V ($=2.0V{\pm}10%$) instead of the conventional VDD is used to the pull-up loads of a VREF circuit and a BL S/A circuit to obtain a wider operational voltage range of the eFuse memory cell. When this proposed cells are used in the simulation, their sensing resistances are found to be $15.9k{\Omega}$ and $32.9k{\Omega}$, in the normal read mode and in the program-verify-read mode, respectively. Furthermore, the read current flowing through a non-blown eFuse is restricted to $97.7{\mu}A$. Thus, the eFuse link of a non-blown eFuse OTP memory cell is kept non-blown. The layout area of the designed 1kb eFuse OTP memory IP based on Dongbu HiTek's BCD process is $168.39{\mu}m{\times}479.45{\mu}m(=0.08mm^2)$.

An Evaluation of the Fire and Explosion Effect by BTX released in a Chemical Plant (화학공장에서의 BTX누출에 의한 화재$\cdot$폭발 영향 평가)

  • Park Ki-Chang;Kim Byung-Jick
    • Journal of the Korean Institute of Gas
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    • v.4 no.3 s.11
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    • pp.9-18
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    • 2000
  • Accident analysis are useful in the design stage of chemical plants and their surrounding structures. Also, analysis results are required for safety management of existing plants. In this paper, the fire and explosion effect by BTX released was evaluated. The computer program was prepared for accident analysis and adopted for evaluating the magnitude of fire (pool fire) and explosion (UVCE) effect. The thermal radiation was used as a measure of fire magnitude and the overpressure as a measure of explosion magnitude. And probit analysis was made for each case. As a case study, benzene tank model was used. The simulation results of explosion of benzene showed that the damage within 20 meters from the accident spot was severe and the damage beyond 60 meters was negligible. The simulation results of fire of benzene showed that the damage in summer is bigger than that in winter. And the damage of city located inland seems to be bigger than that of city in seaside. And thermal radiation effects was negligible beyond 40 meters-distance from the accident spot.

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Design of a On-chip LDO regulator with enhanced transient response characteristics by parallel error amplifiers (병렬 오차 증폭기 구조를 이용하여 과도응답특성을 개선한 On-chip LDO 레귤레이터 설계)

  • Son, Hyun-Sik;Lee, Min-Ji;Kim, Nam Tae;Song, Han-Jung
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.16 no.9
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    • pp.6247-6253
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    • 2015
  • This paper presents the transient-response improved LDO regulator based on parallel error amplifiers. The proposed LDO regulator consists of an error amplifier (E/A1) which has a high gain and narrow bandwidth and a second amplifier (E/A2) which has low gain and wide bandwidth. These amplifiers are in parallel structure. Also, to improve the transient-response properties and slew-rate, some circuit block is added. Using pole-splitting technique, an external capacitor is reduced in a small on-chip size which is suitable for mobile devices. The proposed LDO has been designed and simulated using a Megna/Hynix $0.18{\mu}m$ CMOS parameters. Chip layout size is $500{\mu}m{\times}150{\mu}m$. Simulation results show 2.5 V output voltage and 100 mA load current in an input condition of 2.7 V ~ 3.3 V. Regulation Characteristic presents voltage variation of 26.1 mV and settling time of 510 ns from 100mA to 0 mA. Also, the proposed circuit has been shown voltage variation of 42.8 mV and settling time of 408 ns from 0 mA to 100 mA.

Design of PMOS-Diode Type eFuse OTP Memory IP (PMOS-다이오드 형태의 eFuse OTP IP 설계)

  • Kim, Young-Hee;Jin, Hongzhou;Ha, Yoon-Gyu;Ha, Pan-Bong
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.13 no.1
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    • pp.64-71
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    • 2020
  • eFuse OTP memory IP is required to trim the analog circuit of the gate driving chip of the power semiconductor device. Conventional NMOS diode-type eFuse OTP memory cells have a small cell size, but require one more deep N-well (DNW) mask. In this paper, we propose a small PMOS-diode type eFuse OTP memory cell without the need for additional processing in the CMOS process. The proposed PMOS-diode type eFuse OTP memory cell is composed of a PMOS transistor formed in the N-WELL and an eFuse link, which is a memory element and uses a pn junction diode parasitic in the PMOS transistor. A core driving circuit for driving the array of PMOS diode-type eFuse memory cells is proposed, and the SPICE simulation results show that the proposed core circuit can be used to sense post-program resistance of 61㏀. The layout sizes of PMOS-diode type eFuse OTP memory cell and 512b eFuse OTP memory IP designed using 0.13㎛ BCD process are 3.475㎛ × 4.21㎛ (= 14.62975㎛2) and 119.315㎛ × 341.95㎛ (= 0.0408mm2), respectively. After testing at the wafer level, it was confirmed that it was normally programmed.

Design of Synchronous 256-bit OTP Memory (동기식 256-bit OTP 메모리 설계)

  • Li, Long-Zhen;Kim, Tae-Hoon;Shim, Oe-Yong;Park, Mu-Hun;Ha, Pan-Bong;Kim, Young-Hee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.12 no.7
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    • pp.1227-1234
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    • 2008
  • In this paper is designed a 256-bit synchronous OTP(one-time programmable) memory required in application fields such as automobile appliance power ICs, display ICs, and CMOS image sensors. A 256-bit synchronous memory cell consists of NMOS capacitor as antifuse and access transistor without a high-voltage blocking transistor. A gate bias voltage circuit for the additional blocking transistor is removed since logic supply voltage VDD(=1.5V) and external program voltage VPPE(=5.5V) are used instead of conventional three supply voltages. And loading current of cell to be programmed increases according to RON(on resistance) of the antifuse and process variation in case of the voltage driving without current constraint in programming. Therefore, there is a problem that program voltage can be increased relatively due to resistive voltage drop on supply voltage VPP. And so loading current can be made to flow constantly by using the current driving method instead of the voltage driving counterpart in programming. Therefore, program voltage VPP can be lowered from 5.9V to 5.5V when measurement is done on the manufactured wafer. And the sens amplifier circuit is simplified by using the sens amplifier of clocked inverter type instead of the conventional current sent amplifier. The synchronous OTP of 256 bits is designed with Magnachip $0.13{\mu}m$ CMOS process. The layout area if $298.4{\times}314{\mu}m2$.

A Design of Digital CMOS X-ray Image Sensor with $32{\times}32$ Pixel Array Using Photon Counting Type (포톤 계수 방식의 $32{\times}32$ 픽셀 어레이를 갖는 디지털 CMOS X-ray 이미지 센서 설계)

  • Sung, Kwan-Young;Kim, Tae-Ho;Hwang, Yoon-Geum;Jeon, Sung-Chae;Jin, Seung-Oh;Huh, Young;Ha, Pan-Bong;Park, Mu-Hun;Kim, Young-Hee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.12 no.7
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    • pp.1235-1242
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    • 2008
  • In this paper, x-ray image sensor of photon counting type having a $32{\times}32$ pixel array is designed with $0.18{\mu}m$ triple-well CMOS process. Each pixel of the designed image sensor has an area of loot $100{\times}100\;{\mu}m2$ and is composed of about 400 transistors. It has an open pad of an area of $50{\times}50{\mu}m2$ of CSA(charge Sensitive Amplifier) with x-ray detector through a bump bonding. To reduce layout size, self-biased folded cascode CMOS OP amp is used instead of folded cascode OP amp with voltage bias circuit at each single-pixel CSA, and 15-bit LFSR(Linear Feedback Shift Register) counter clock generator is proposed to remove short pulse which occurs from the clock before and after it enters the counting mode. And it is designed that sensor data can be read out of the sensor column by column using a column address decoder to reduce the maximum current of the CMOS x-ray image sensor in the readout mode.