• 제목/요약/키워드: LCD TFT array

검색결과 54건 처리시간 0.02초

대화면/고화질 TFT-LCD 개발을 위하여 ELA 및 SMC로 제작된 다결정 실리콘 박막 트랜지스터의 화소 특성 비교 (Comparative Pixel Characteristics of ELA and SMC poly-Si TETs for the Development of Wide-Area/High-Quality TFT-LCD)

    • 한국진공학회지
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    • 제10권1호
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    • pp.72-80
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    • 2001
  • 본 논문에서는 ELA(excimer laser annealing) 및 SMC(silicide mediated crystallization) 공정으로 제작된 다결정 실리콘 TFT-LCD(Thin Film Transistor-Liquid Crystal Display) 화소의 전기적 특성을 Spice회로 시뮬레이션을 통해 비교 분석하였다. 복잡한 TFT-LCD 어레이 (array) 회로의 전기적 특성 분석을 위하여 GUI(Graphic User Interface) 방식으로 손쉽게 복잡한 회로를 구성할 수 있는 PSpice에 AIM-Spice의 다결정 실리콘 박막 트랜지스터 소자 모델을 이식하고, AIM-Spice의 변수 추출법을 개선 체계화하였으며 ELA 및 SMC공정으로 각기 제작된 다결정 실리콘 박막트랜지스터에 적용하여 단위 화소 및 라인 RC 지연을 고려한 화소 특성을 비교 분석하였다. 비교 결과 ELA 다결정 실리콘 박막 트랜지스터 소자가 SMC에 비해 TFT-LCD의 화소 충전 시간 및 킥백(kickback) 전압 특성이 모두 우수하게 나타남을 확인하였다.

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화소 설계 어레이 시뮬레이터 (PDAST)를 이용한 대면적 고화질을 위한 TFT-LCD의 화소설계 (YFY-LCD Pixel Design for Large Size, High Quality using PDAST(Pixel Design Array Simulator))

  • 이영삼;윤영준;정순신;최종선
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1998년도 하계학술대회 논문집 D
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    • pp.1364-1366
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    • 1998
  • An active-matrix LCD using thin film transistors (TFT) has been widely recognized as having potential for high-quality color flat-panel displays. Pixel-Design Array Simulation Tool (PDAST) was used to profoundly understand the gate signal distortion and pixel charging capability, which are the most critical limiting factors for high-quality TFT-LCDs. Since PDAST can simulate the gate, data and pixel voltages of a certain pixel on TFT array at any time and at any location on an array, the effect of the resistivity of gate line material on the pixel operations can be effectively analyzed. The gate signal delay. pixel charging ratio, level-shift of the pixel voltage were simulated with varying the parameters. The information obtained from this study could be utilized to design the larger area and finer image quality panel.

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대면적 고화질 TFT-LCD의 Feed-through 전압 보상을 위한 Gate Driving 방법 (Gate Driving Methods to Compensate Feed-Through Voltage for Large Size, High Quality TFT-LCD)

  • 정순신;윤영준;박재우;최종선
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 1999년도 추계학술대회 논문집
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    • pp.99-102
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    • 1999
  • In recent years, attempts have been made to greatly improve the display quality of active-matrix liquid crystal display devices, and many techniques have been proposed to solve such problems as gate signal delay, feed-through voltage and image sticking. To improve these problems which are caused by the fried-through voltage, we have evaluated new driving methods to reduce the fled-through voltage. Two level gate-pulse was used for the gate driving of the cst-on-common structure pixels. And two-gate line driving methods with the optimized gate signals were applied for the cst-on-gate structure pixels. These gate driving methods were better feed-through characteristics than conventional simple gate pulse. The evaluation of the suggested driving methods were performed by using a TFT-LCD array simulator PDAST which can simulate the gate, data and pixel voltages of a certain pixel at any time and at any location on a TFT array. The effect of the new driving method was effectively analyzed.

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게이트 라인 물질의 저항률이 TFT-LCD 화소의 동작에 미치는 영향 (Effects of Resistivity of Gate Line Material on TFT-LCD Pixel Operations)

  • 이영삼;최종선
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 1998년도 춘계학술대회 논문집
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    • pp.321-324
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    • 1998
  • Pixel-Design Array Simulation Tool(PDAST) was used to profoundly the gate signal distortion and pixel changing capability, which are the most critical limiting factors for high-quality TFT-LCDs. Since PDAST can simulate the gate, data and pixel voltages of a certain pixel on TFT array at any time and at any location on an array, the effect of the resistivity of gate line material on the pixel operations can be effectively analyzed. The gate signal delay, pixel charging ratio, level-shift of the pixel voltage were simulated with varying the resis5tivity of the gate line material. The information obtained from this study could be utilized to design the larger area and finer image quality panel.

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Core Technology for Prominent COT (Color Filter On TFT Array) Structure

  • Kim, D.G.;Park, S.R.;Kim, S.J.;Park, J.J.;Seo, C.R.;Chung, I.J.
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2004년도 Asia Display / IMID 04
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    • pp.393-394
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    • 2004
  • To get rid of cell assembly margin and have more process room of upper substrate, we developed truly COT (Color Filter On TFF Array) LCDs in that B/M (Black Matrix) as well as C/F (Color Filter) layer is located on TFT substrate. Novel B/M material is also developed for this COT structure. Difficulty in making contact hole through C/F layer was solved by making each C/F pattern isolated from others. We think this configuration will be core technology for prominent COT LCDs.

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실험적 정전용량 모델과 축적 용량 설계 방법에 따른 TFT-LCD 화소의 동작 특성 (Effects of an Empirical Capacitance Models and Storage Capacitance Types on TFT-LCD Pixel Operations)

  • 윤영준;정순신;박재우;최종선
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1999년도 하계학술대회 논문집 D
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    • pp.1750-1752
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    • 1999
  • An active-matrix liquid crystal display (LCD) using thin film transistors (TFTs) has been widely recognized as having potential for high-quality color flat-panel displays. Pixel-Design Array Simulation Tool (PDAST) was used to profoundly understand the gate signal distortion and pixel charging capability, which are the most critical limiting factors for high-quality TFT-LCDs. Since PDAST can simulate the sate, data and pixel voltages of a certain pixel on TFT array at any time and at any location on an array, the effect of the new set of capacitance models on the pixel operations can be effectively analyzed. The set of models which is adopted from VLSI interconnections calculate more precise capacitance. The information obtained from this study could be utilized to design the larger area and finer image quality panel.

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TFT-LCD 공통 전극 전압에 의한 화소 전압 보상 및 Inversion 방법에 따른 화소특성 시뮬레이션 (Compensations of Pixel Voltages by Common Electrode Voltages and Simulations of Pixel Characteristics on Inversion Methods in TFT-LCD)

  • 김태형;박재우;김진홍;최종선
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2000년도 하계학술대회 논문집 C
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    • pp.1745-1747
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    • 2000
  • TFT-LCD simulator, PDAST(Pixel Design Array Simulation Tool) could simulate the effect of the variation on the pixel characteristics. Since feed-through voltage in TFT-LCD can be a serious problem to pixel voltage characteristics, it should be compensated. It is applicable to various kinds of TFT-LCDs and can be used to calculate the spontaneous part of common electrode voltage accurately. Also, PDAST can estimate pixel voltage according to various inversion methods. It allows high-speed calculation and the information obtained from this study could be utilized to design the larger area and finer image quality panel.

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A Data-line Sharing Method for Lower Cost and Lower Power in TFT-LCDs

  • Park, Haeng-Won;Moon, Seung-Hwan;Kang, Nam-Soo;Lee, Sung-Yung;Park, Jin-Hyuk;Kim, Sang-Soo
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2005년도 International Meeting on Information Displayvol.I
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    • pp.531-534
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    • 2005
  • This paper presents a new data line sharing technique for TFT-LCD panels. This technique reduces the number of data driver IC's to half by having two adjacent pixels share the same data line. This in turn doubles the number of gate lines, which are integrated directly on the glass substrate of amorphous silicon for further cost reduction and more compactness. The proposed technique with new pixel array structure was applied to 15.4 inch WXGA TFT-LCD panels and has proven that the number of driver IC's were halved with nearly 41% circuit cost reduction and 5.3% reduction in power consumption without degrading the image quality.

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고효율 LCD 감광막 제거기술 구현 연구 (A Study on the Realization of the High Efficiency LCD Photoresist Removal Technology)

  • 손영수;함상용;김병인;이성휘
    • 한국전기전자재료학회논문지
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    • 제20권11호
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    • pp.977-982
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    • 2007
  • The realization of the photoresist(PR) removal method with vaporized water and ozone gas mixture has been studied for the LCD TFT array manufacturing. The developed PR stripper uses the water boundary layer control method based on the high concentration ozone production technology. We develop the prototype of PR stripper and experiment to find the optimal process parameter condition like as the ozone gas flow/concentration, process reaction time and thin boundary layer formation. As a results, we realize the LCD PR strip rate over the 0.4 ${\mu}m/min$ and this PR removal rate is more than 5 times higher than the conventional immersion type ozonized water process.

Dual Select Diode AMLCDs;A Path Towards Scalable Two Mask Array Designs

  • Boer, Willem Den;Smith, G. Scott
    • 한국정보디스플레이학회:학술대회논문집
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    • 한국정보디스플레이학회 2004년도 Asia Display / IMID 04
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    • pp.383-388
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    • 2004
  • In this paper an alternative Active Matrix LCD technology is described with scalable, low cost processing. The Dual Select Diode AMLCD requires 60% lower capital investment in the array process than a-Si TFT arrays and results in 20% lower cost LCD modules. Development at several AMLCD manufacturers is in progress.

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