Effects of an Empirical Capacitance Models and Storage Capacitance Types on TFT-LCD Pixel Operations

실험적 정전용량 모델과 축적 용량 설계 방법에 따른 TFT-LCD 화소의 동작 특성

  • Yun, Young-Jun (School of Electronics and Electrical Engineering, Hong-Ik University) ;
  • Jung, Soon-Shin (School of Electronics and Electrical Engineering, Hong-Ik University) ;
  • Park, Jae-Woo (School of Electronics and Electrical Engineering, Hong-Ik University) ;
  • Choi, Jong-Sun (School of Electronics and Electrical Engineering, Hong-Ik University)
  • 윤영준 (홍익대학교 전자전기공학부) ;
  • 정순신 (홍익대학교 전자전기공학부) ;
  • 박재우 (홍익대학교 전자전기공학부) ;
  • 최종선 (홍익대학교 전자전기공학부)
  • Published : 1999.07.19

Abstract

An active-matrix liquid crystal display (LCD) using thin film transistors (TFTs) has been widely recognized as having potential for high-quality color flat-panel displays. Pixel-Design Array Simulation Tool (PDAST) was used to profoundly understand the gate signal distortion and pixel charging capability, which are the most critical limiting factors for high-quality TFT-LCDs. Since PDAST can simulate the sate, data and pixel voltages of a certain pixel on TFT array at any time and at any location on an array, the effect of the new set of capacitance models on the pixel operations can be effectively analyzed. The set of models which is adopted from VLSI interconnections calculate more precise capacitance. The information obtained from this study could be utilized to design the larger area and finer image quality panel.

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