• Journal of Korea Society of Industrial Information Systems
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• v.7 no.5
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• pp.147-153
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• 2002

In this paper, a substrate network model to be used with BSIM3 MOSFET model for submicron MOSFETs in giga hertz frequencies and its direct parameter extraction with physically meaningful values are proposed. The proposed substrate network model includes a conventional resistance and single inductance originated from ring-type substrate contacts around active devices. Model parameters are extracted from S-parameter data measured from common-bulk configured MOS transistors with floating gate and use where needed without any optimization process. The proposed modeling technique has been applied to various-sized MOS transistors. The substrate model has been validated for frequency up to 300Hz.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.56 no.3
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• pp.519-523
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• 2007

In this paper, we propose a precise parameter extraction of interior permanent magnet (IPM) motors based on finite element analysis. For the calculation of the two-axis inductances Ld and Lq, the slotting effect and cross magnetization due to torque angle are considered. It is examined that back electro-motive force (BEMF) constant is affected by the magnetic saturation in different ways dependent on motor types. Numerical analyses and some measurements are performed for a spoke type and a flux barrier type IPM motors

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.899-902
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• 2003

Chip Pin Parasitic은 실제 Chip Pad에서부터 Bonding Wire를 통한 Package Lead Frame까지를 의미한다. 여기서, Lead Frame 및 Bonding Wire에서 Inductance 및 작은 저항이 보이고, Chip Pad에서의 Capacitance, 그리고 Pad 부터 Ground까지의 Return Path에서 발생하는 저항이 보인다. 이들을 모두 합하면 L, R, C의 Series로 나타낼 수 있다. 본 논문에서는 이런 Chip Pin Parasitic을 추출 하기 위해서 TDR(Time Domain Reflectometer)과 NA(Network Analyzer)를 사용하였는데, TDR의 경우 PCB를 제작하여 Chip을 Board위에 붙인 후 Time Domain에서 측정 하였고 NA의 경우 Pico Probe를 이용하여 Chip pin에 직접 Probing해서 Smith Chart를 통하여 Extraction 값을 추출했다. 이 경우, NA를 이용한 측정이 좀 더 정확한 Parasitic 값을 추출할 수 있으리라 예상되겠지만, 실제로 Chip이 구동하기 위해서는 Board위에 있을 때의 상황도 고려해야 하기 때문에 TDR 추출 값과 NA 추출 값을 모두 비교하였다.

• Proceedings of the Korea Society of Information Technology Applications Conference
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• 2002.11a
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• pp.363-370
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• 2002

A substrate network model characterizing substrate effect of submicron MOS transistors for RF operation and its parameter extraction with physically meaningful values are presented. The proposed substrate network model includes a single resistance and inductance originated from ring-type substrate contacts around active devices. Model parameters are extracted from S-parameter data measured from common-bulk configured MOS transistors with floating gate and use where needed with out any optimization. The proposed modeling technique has been applied to various-sized MOS transistors. Excellent agreement the measurement data and the simulation results using extracted substrate network model up to 30GHz.

• Proceedings of the Korea Society for Industrial Systems Conference
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• 2002.11a
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• pp.363-370
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• 2002

A substrate network model characterizing substrate effect of submicron MOS transistors for RF operation and its parameter extraction with physically meaningful values are presented. The proposed substrate network model includes a single resistance and inductance originated from ring-type substrate contacts around active devices. Model parameters are extracted from S-parameter data measured from common-bulk configured MOS transistors with floating gate and use where needed with out any optimization. The proposed modeling technique has been applied to various-sized MOS transistors. Excellent agreement the measurement data and the simulation results using extracted substrate network model up to 30㎓

• Proceedings of the IEEK Conference
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• 2000.07b
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• pp.1119-1122
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• 2000

This paper describes on RF circuit simulation technique, especially on a RF modeling and a model extraction of a LDMOS(Lateral Diffused MOS) that has gate-width (Wg) dependence. Small-signal model parameters of the LDMOSs with various gate-widths extracted from S-parameter data are applied to make the relation between the RF performances and gate-width. It is proved that a source inductance (Ls) was not applicable to scaling rules. These extracted small-signal model parameters are also utilized to remove extrinsic elements in an extraction of a large-signal model (using HP Root MOSFET Model). Therefore, we can omit an additional measurement to extract extrinsic elements. When the large-signal model with Ls having the above gate-width dependence is applied to a high-power LDMOS module, the simulated performances (Output power, etc.) are in a good agreement with experimental results. It is proved that our extracted model and RF circuit simulation have a good accuracy.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.12
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• pp.21-26
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• 2004

In this paper, a direct method is developed to extact RF equivalent circuit of a packaged BJT without optimization. First, parasitic components of plastic package are removed from measured S-parameters using open and short package patterns. Using package do-embedded S-parameters, a direct and simple method is proposed to extract bonding wire inductance and chip pad capacitance between package lead and chip pad. The small-signal model parameters of internal BJT are next determined by Z and Y-parameter formula derived from RF equivalent circuit. The modeled S-parameters of packaged BJT agree well with measured ones, verifying the accuracy of this new extraction method.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.37 no.11
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• pp.17-22
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• 2000

A novel and robust direct parameter extraction method for hybrid-p equivalent circuit model of HBT is proposed. A new expression that can accurately resolve the base internal resistance from the measured S-parameters is derived, and it is not sensitive to the values of parasitic access inductance values. Based on the expression, six analytical expressions for the other parameters is developed and these expressions for hybrid-p equivalent circuit modeling ensure robust, fast, and reliable parameter extraction.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.29 no.11
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• pp.82-88
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• 2015

In recent years, numerous studies have attempted to find and explore the auxiliary brake and the oil pressure type and electrical type are mainly used. However, the model proposed here is to self-excited eddy current brake. The advantage of this is it does not require an external power supply and can be produced to reduce the size than others. This self-eddy current brake consists of RLC circuit so resistance, inductance and capacitance value can be considered a fixed value. But, inductance and resistance value changes depending on the shape, temperature and magnetic alteration. Therefore, in this paper, the focal point is characteristic analysis according to the parameter variations. Also, using this result, this paper explains how to estimate the capacitance.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.39 no.1
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• pp.49-57
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• 2002

Including RF Package inductance, substrate coupling through conductive silicon(Si)-substrate is modeled and quantitatively characterized. 2-port substrate coupling model is extended for the characterization of multi-port substrate coupling between digital circuit block and analog/RF circuit block. Furthermore, scalable parameter extraction model is developed. Multi-port substrate coupling can be investigated by linearly superposing a frequency-dependent 2-port substrate coupling model using scalable parameters. In addition, Substrate coupling including RF package inductance effect is quantitatively investigated. It is shown that package effect increases substrate coupling and shifts a characteristic frequencies(i.e., poles) to the higher frequency range. The proposed methodology can be efficiently used to the mixed-signal circuit performance verification.