• Nuclear Engineering and Technology
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• 제53권2호
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• pp.688-694
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• 2021

The aim of this work is the analysis, design and hardware implementation of the fractional-order point kinetics (FNPK) model along with its closed-loop controller. The stability and closed-loop control of FNPK models are critical issues. The closed-loop stability of the controller-plant structure is established. Further, the designed PI/PD controllers are implemented in real-time on a DSP processor. The simulation and real-time hardware studies confirm that the designed PI/PD controllers result in a damped stable closed-loop response.

• 산업경영시스템학회지
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• 제20권42호
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• pp.131-141
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• 1997

The purpose of this study is to certify the actual state of JIT(Just-in-Time) production system's implementation of Korean manufacturing industries and to exhibit the appropriate JIT system considering the company's characteristics, for attain the superior competitiveness. To understand the current situations of JIT system's implementation a questionnaire study is performed. Total 152 valid questionnaires are collected by personal visit and mailing method. All the data is statistically analyzed by SPSS PC+ and SAS program and reviewed to develop a strategy for JIT implementation of Korean manufacturing companies.

• ETRI Journal
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• 제31권2호
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• pp.240-242
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• 2009

A computationally efficient implementation of the progressive edge-growth algorithm is presented. This implementation uses an array of red-black (RB) trees to manage the layered structure of check nodes and adopts a new strategy to expand the Tanner graph. The complexity analysis and the simulation results show that the proposed approach reduces the computational effort effectively. In constructing a low-density parity check code with a length of $10^4$, the RB-tree-array-based implementation takes no more 10% of the time required by the original method.

• 산업공학
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• 제22권1호
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• pp.85-94
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• 2009

Nowadays, most of the major manufacturing companies prepare their manufacturing schedule using package based solutions. Even though the accuracy of the detail scheduling result is high at implementation, however, it is low during maintenance period. The main cause of low accuracy during maintenance period is due to difficulties in maintaining the accurate level of master data. In this paper, we propose to easily maintain setup time, which is one of the most important factors required in master data to achieve good scheduling result, after changing job. This paper is mainly focused on how to deduce the factors that influence the setup time in a roll-based manufacturing field with print operations. For this purpose, we employed rule based algorithm and applied for deciding setup time for the existing product items. Likewise, it can be applied to new items without any complex setup procedures, and, finally, it displays the result of the real setup-time and calculated setup-time.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1997년도 추계학술대회 논문집 학회본부
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• pp.133-135
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• 1997

In this paper, a fuzzy tuning discrete-time repetitive control is suggested for a robot manipulator. Real-time implementation of this type of repetitive controller is also performed for a 2 link direct drive robot by using a real-time control system which consists of a real-time OS(Spectra), a single board computer, a communication board and an analog input/output board. First, it is shown that the tracking error is effectively reduced by discrete-time repetitive control. Second, the convergence performance is shown to be much improved by the suggested controller using real-time experimentations.

• 로봇학회논문지
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• 제18권3호
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• pp.281-284
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• 2023

Real-time control communication network system is important for developing defense robots because it affects environmental interaction, performance, and safety. We propose a real-time control communication network using the Xenomai real-time operating system and the open-source EtherCAT master library, SOEM. EtherCAT is an Ethernet-based industrial communication method. It has low latency and many functions such as cable redundancy and distributed clock synchronization. We use Xenomai RTOS and Intel NUC to develop the system. Experimental tests demonstrate the Real-time EtherCAT master implementation, and communication with CiA301-based slave devices. The jitter measurement was conducted to validate the real-time performance of the system. The proposed system shows possibility for real-time robotics applications in various defense robots.

• 한국멀티미디어학회논문지
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• 제8권12호
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• pp.1649-1657
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• 2005

In this paper, a fast implementation of JPEG is discussed and its application to multimedia service is presented for mobile wireless internet. A fast JPEG player is developed based on several fast algorithms for mobile handset. In the color transformation, RCT is adopted instead of ICT for JPEG source. For the most time-consuming DCT part, the binDCT can reduce the decoding time. In upsampling and RGB conversion, the transformation from YCbCr to RGB 16 bit is made at one time. In some parts, assembly language is applied for high-speed. Also, an implementation of multimedia in mobile handset is described using MJPEG (Motion JPEG) and QCELP(Qualcomm Code Excited Linear Prediction Coding). MJPEG and QCELP are used for video and sound, which are synchronized in handset. For the play of MJPEG, the decoder is implemented as a S/W upon the MSM 5500 baseband chip using the fast JPEG decoder. For the play of QCELP, the embedded QCELP player in handset is used. The implemented multimedia player has a fast speed preserving the image quality.

• 대한의용생체공학회:의공학회지
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• 제26권2호
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• pp.65-71
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• 2005

The main obstacles for adopting a mobile health information system to existing hospital information system are the redundancy of clinical data and the additional workload for implementing the new system. To obtain a seamless communication and to reduce the workload of implementation, an easy and simple implementation strategy is required. We propose a mobile clinical information system (MobileMed) which is specially designed for the easy implementation. The key elements of MobileMed are a smart interface, an HL7 message server, a central clinical database (CCDB), and a web server. The smart interface module transfers the key information to the HL7 message server as new clinical tests data is recorded in the existing laboratory information system. The HL7 message server generates the HL7 messages and sends them to the CCDS. As a central database the CCDS collects the HL7 messages and presents them to the various mobile devices such as PDA. Through this study we might conclude that the architecture for the mobile system will be efficient for real-time data communication, and the specially designed interface will be an easy tool for implementing the mobile clinical information system.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2006년도 하계종합학술대회
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• pp.257-258
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• 2006

In this paper, we address several issues in the real time implementation of MPEG-1 Layer II decoder on a fixed-point digital signal processor (DSP), especially TMS320C6416. There is a trade-off between processing speed and the size of program/data memory for the optimal implementation. In a view of the speed optimization, we first convert the floating point operations into fixed point ones with little degradation in audio quality, and then the look-up tables used for the inverse quantization of the audio codec are forced to be located into the internal memory of the DSP. And then, window functions and filter coefficients in the decoder are precalculated and stored as constant, which makes the decoder faster even larger memory size is required. It is shown from the real-time experiments that the fixed-point implementation enables us to make the decoder with a sampling rate of 48 kHz operate with 3 times faster than real-time on TMS320C6416 at a clock rate of 600 MHz.

• IEIE Transactions on Smart Processing and Computing
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• 제4권4호
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• pp.237-250
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• 2015

This paper describes a hardware-oriented algorithm and its conceptual implementation in a real-time speed limit traffic sign detection system on an automotive-oriented field-programmable gate array (FPGA). It solves the training and color dependence problems found in other research, which saw reduced recognition accuracy under unlearned conditions when color has changed. The algorithm is applicable to various platforms, such as color or grayscale cameras, high-resolution (4K) or low-resolution (VGA) cameras, and high-end or low-end FPGAs. It is also robust under various conditions, such as daytime, night time, and on rainy nights, and is adaptable to various countries' speed limit traffic sign systems. The speed limit traffic sign candidates on each grayscale video frame are detected through two simple computational stages using global luminosity and local pixel direction. Pipeline implementation using results-sharing on overlap, application of a RAM-based shift register, and optimization of scan window sizes results in a small but high-performance implementation. The proposed system matches the processing speed requirement for a 60 fps system. The speed limit traffic sign recognition system achieves better than 98% accuracy in detection and recognition, even under difficult conditions such as rainy nights, and is implementable on the low-end, low-cost Xilinx Zynq automotive Z7020 FPGA.