• 한국정보디스플레이학회:학술대회논문집
• /
• 2003.07a
• /
• pp.981-983
• /
• 2003

Using the conventional standard CMOS logic process, the high voltage MOSFET to drive top emission OLEDs was fabricated for the silicon-based organic electroluminescent display. The drift region of the conventional high voltage MOSFET was implemented by the n-well of the logic process. The measurement result shows a good saturation characteristic up to 50 V without breakdown phenomena.

• 한국정보디스플레이학회:학술대회논문집
• /
• 2005.07b
• /
• pp.1310-1312
• /
• 2005

Passivation of organic thin-film transistors (OTFTs) using organic and metal thin-film was presented. Parylene-C and titanium were used as an organic and metal layer, respectively. With the proposed passivation method the degradation of electric parameters of OTFTs was relieved compared with non-passivated devices. Several electric parameters such as on/off current, field-effect mobility, and threshold voltage were shown.

• 한국정보디스플레이학회:학술대회논문집
• /
• 2005.07b
• /
• pp.1317-1319
• /
• 2005

Bottom contact pentacene organic thin-film transistors are fabricated at three different substrate temperatures, $70^{\circ}C$, $80^{\circ}C$ and $90^{\circ}C$. The maximum effective mobility was obtained at $80^{\circ}C$. The contact resistance was extracted by applying two different methods, TLM method and channel-resistance method, and the value shows the minimum at $80^{\circ}C$, which is thought to be the important reason for the best performance.

• Proceedings of the IEEK Conference
• /
• 2006.06a
• /
• pp.475-476
• /
• 2006

Recently, the demand for high density MOSFET arrays are increasing. In implementing 3-D devices to this end, it is inevitable to ion-implant vertically in order to avoid screening effects caused by high silicon fins. In this study, the dependency of drain current characteristics on doping profiles is investigated by 3-D numerical analysis. The position of concentration peak (PCP) and the doping gradient are varied to look into the effects on primary current characteristics. Through these analyses, criteria of ion-implantation for 3-D devices are established.

• 한국정보디스플레이학회:학술대회논문집
• /
• 2007.08b
• /
• pp.1270-1272
• /
• 2007

Analytic equations are derived from physical quantities in the gate-source overlap region and the concept of effective gate-source overlap length is proposed. The effective overlap length can be affected by gate voltage, insulator thickness and semiconductor thickness, and the overlap length should be larger than the length to obtain maximum driving current.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.9 no.1
• /
• pp.61-66
• /
• 2009

We have investigated the noise sensitivity of low noise amplifier (LNA) at different frequency. This noise sensitivity analysis provides insights about noise parameters and it is very beneficial for making appropriate design trade-offs. From this work, the circuit designer can choose the adequate noise parameters tolerances.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.9 no.1
• /
• pp.55-60
• /
• 2009

The channel backscattering coefficient and injection velocity have been extracted experimentally in 65nm MOSFETs. Thanks to an experimental extraction methodology taking into account multi-subband population, we demonstrate that the short channel ballistic efficiency is slightly greater than long channel ballistic efficiency.

• 한국정보디스플레이학회:학술대회논문집
• /
• 2006.08a
• /
• pp.1139-1141
• /
• 2006

For the bottom-contact pentacene organic thin-film transistors (OTFTs), the insertion of a thin PMMA layer $(20{\AA})$ between the pentacene and the electrode improves the electrical performances, such as carrier mobility and on-current magnitude, about 4 times larger than those of the devices without the PMMA. The performance enhancement is presumably due to the decreased contact resistance between metal and pentacene by inserting the thin PMMA layer.

• 한국정보디스플레이학회:학술대회논문집
• /
• 2003.07a
• /
• pp.11-14
• /
• 2003

A silicon based OELD driving circuit that has a new type of column driving method is proposed to reduce the driving circuit area. In comparison with the conventional method, latches in each column are removed and one DAC (digital-to-analog converter) drives several column lines. To make the DAC operate during a specific period for the low power consumption, a simple DESG (DAC Enable Signal Generator) circuit was devised and confirmed by the simulation.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.13 no.1
• /
• pp.79-86
• /
• 2013

We describe a neural stimulator front-end with arbitrary stimulation waveform generator and adaptive supply regulator (ASR) for visual prosthesis. Each pixel circuit generates arbitrary current waveform with 5 bit programmable amplitude. The ASR provides the internal supply voltage regulated to the minimum required voltage for stimulation. The prototype is implemented in $0.35{\mu}m$ CMOS with HV option and occupies $2.94mm^2$ including I/Os.