• 천문학회보
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• 제43권1호
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• pp.31.3-32
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• 2018

Supernovae (SNe) are well known as good cosmological distance probes owing to their brightness. Specifically, type Ia SNe contribute greatly to our understanding of acceleration of cosmic expansion. However, type IIP supernovae are the most common type of SNe and have been found out to a large redshift, so the application of these SNe as distance indicators is promising. IMSNG is a project for monitoring nearby galaxies (<50Mpc) to catch early light curves of transients and get inspections of their progenitors. The daily monitoring observation allows us to construct a dense light curve of SNe, too. In this talk, we present the light curves of two SNe IIP, SN 2014cx (NGC337) and SN 2017eaw (NGC6946), using our IMSNG data. A newly developed technique, the Photometric Color Method (PCM), employs only photometric data to estimate distances for SNe IIP. We present the distances to our targets measured through PCM and compare this to that of obtained via other methods.

• 대한전자공학회논문지SD
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• 제48권7호
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• pp.23-29
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• 2011

본 논문에서는 GPS 수신기를 위한 dB-선형 특성이 개선된 가변 이득 증폭기 회로를 제안한다. 제안된 dB-선형 전류 발생기는 dB-선형성 오차가 ${\pm}0.15$dB 이내로 개선되었다. 개선된 dB-선형 전류 발생기를 사용하여 GPS 수신기를 위한 가변 이득 증폭기를 설계였다. GPS 수신기의 IF 주파수는 4MHz를 가정하였고, 선형성 요구조건을 도출하여 만족하기 위해 최소 이득일때 24dBm의 IIP3를 만족하도록 하였다. 가변이득 증폭기는 3단으로 구성되어 있으며 DC-오프셋 제거 루프를 통하여 회로의 오프셋 전압을 보상하였다. 설계된 가변 이득 증폭기의 이득은 -8dB~52dB의 범위를 가지며 이득의 dB-선형성은 ${\pm}0.2$dB 이내를 충족한다. 3-dB 주파수 대역폭은 이득에 따라 35MHz~106MHz를 보인다. 가변 이득 증폭기는 CMOS 0.18${\mu}m$ 공정을 이용하여 설계되었으며 전력은 1.8V 전원 전압에서 3mW를 소비한다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제4권3호
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• pp.168-173
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• 2004

A low power CMOS receiver baseband analog circuit based on alternating filter and gain stage is reported. For the given specifications of the baseband analog block, optimum allocation of the gain, IIP3 and NF of the each block was performed to minimize current consumption. The fully integrated receiver BBA chain is fabricated in $0.18\;{\mu}m$ CMOS technology and IIP3 of 30 dBm with a gain of 55 dB and noise figure of 31 dB are obtained at 4.86 mW power consumption.

• JSTS:Journal of Semiconductor Technology and Science
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• 제8권4호
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• pp.283-288
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• 2008

A post-linearization technique for the differrential CMOS LNA is presented. The proposed method uses an additional cross-coupled common-source FET pair to cancel out the third-order intermodulation ($IM_3$) current of the main differential amplifier. This technique is applied to enhance the linearity of CMOS LNA using $0.18-{\mu}m$ technology. The LNA achieved +10.2 dBm IIP3 with 13.7 dB gain and 1.68 dB NF at 2 GHz consuming 11.8 mA from a 1.8-V supply. It shows IIP3 improvement by 6.6 dB over the conventional cascode LNA without the linearizing circuit.

• 한국정보통신학회:학술대회논문집
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• 한국정보통신학회 2012년도 추계학술대회
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• pp.829-831
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• 2012

본 논문은 차량 추돌 예방 레이더용 고 이득 저전력 저잡음 특성을 가진 24GHz 저잡음 증폭기(LNA)를 제안한다. 이러한 회로는 TSMC $0.13{\mu}m$ 혼성신호/고주파 CMOS 공정($f_T/f_{MAX}=120/140GHz$)으로 설계되어 있다. 증폭기의 전압 이득을 향상시키기 위해 2단 캐스코드 구조로 구성되어 있다. 제안한 저잡음 증폭기는 최근 발표된 연구결과에 비해 41dB의 가장 높은 전압이득과 3.7dB의 가장 낮은 잡음지수 및 2.8dBm의 가장 우수한 IIP3 특성을 각각 보였다.

• ETRI Journal
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• 제33권3호
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• pp.462-465
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• 2011

A millimeter-wave (mm-wave) high-linear low-noise amplifier (LNA) is presented using a 0.18 ${\mu}m$ standard CMOS process. To improve the linearity of mm-wave LNAs, we adopted the multiple-gate transistor (MGTR) topology used in the low frequency range. By using an MGTR having a different gate-source bias at the last stage of LNAs, third-order input intercept point (IIP3) and 1-dB gain compression point ($P_{1dB}$) increase by 4.85 dBm and 4 dBm, respectively, without noise figure (NF) degradation. At 33 GHz, the proposed LNAs represent 9.5 dB gain, 7.13 dB NF, and 6.25 dBm IIP3.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2000년도 추계종합학술대회 논문집(2)
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• pp.104-107
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• 2000

We designed and implemented the RFIC(RF front-end IC) for DTV(Digital TV) tuner. The DTV tuner RF front-end consists of low noise IF amplifier fur the amplification of 900 MHz RF signal and down conversion mixer for the RF signal to 44MHz IF conversion. The RFIC is implemented on ETRI 0.8u high resistive (2㎘ -cm) and evaluated by on wafer, packaged chip test. The gain and IIP3 of IF amplifier are 15㏈ and -6.6㏈m respectively. For the down conversion mixer gain and IIP3 are 13㏈ and -6.5㏈m. Operating voltage of the IF amplifier and the down mixer is 5V, current consumption are 13㎃ and 26㎃ respectively.

• 한국전자파학회:학술대회논문집
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• 한국전자파학회 2002년도 종합학술발표회 논문집 Vol.12 No.1
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• pp.77-81
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• 2002

This paper demonstrates a CMOS downconversion mixer for 2.4GHz ISM band applications. The mixer, implemented in a 0.18um CMOS process, is based on the CMOS Gilbert Cell mixer, With a 2.5GHz local oscillator and a 2.45GHz RF input, the measurement results exhibit power conversion gam of -6dB, IIP3 of -6dBm, input $P_{-1dB}$ of -15 dBm, and power dissipation in mixer core of 2.7 mW with 0㏈m LO power and 1.8V supply voltage.

• JSTS:Journal of Semiconductor Technology and Science
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• 제13권6호
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• pp.551-555
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• 2013

Linearity characteristics of hetero-gate-dielectric tunneling field-effect transistors (HG TFETs) have been compared with those of high-k-only and $SiO_2$-only TFETs in terms of IIP3 and P1dB. It has been observed that the optimized HG TFETs have higher IIP3 and P1dB than high-k-only and $SiO_2$-only TFETs. It is because HG TFETs show higher transconductance ($g_m$) and current drivability than $SiO_2$-only TFETs and $g_m$ less sensitive to gate voltage than high-k-only TFETs.

• 한국정보통신학회논문지
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• 제8권6호
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• pp.1158-1165
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• 2004

본 논문에서는 802.11a 무선 근거리 통신망 (wireless LAN)에서 사용 가능한 5.25㎓ SiGe 저잡음 증폭기(LNA)를 제안한다. 본 저잡음 증폭기는 2단 구조로 1V의 공급전압에서 동작하며, 0.18$\mu\textrm{m}$ SiGe 공정으로 제작되었다. 이 저잡음 증폭기의 경우 5.25㎓의 동작주파수에서 17㏈의 전압이득, 2.7㏈의 잡음지수, -l5㏈의 반사계수, -5㏈md의 IIP3 및 -14㏈m의 1㏈ compression point와 같은 우수한 동작특성을 보였으며, 바이어스 회로에서 소모되는 0,5㎽를 포함하여 전체회로에서 소모되는 총 전력은 7㎽이다.