• 한국군사과학기술학회지
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• 제19권3호
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• pp.294-301
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• 2016

In this paper, we designed the transparent circuit analog radar absorbing structure using printed metal grid mesh for enhanced optical transmittance. To obtain wideband electromagnetic absorption and enhanced optical transparency at X-band, we proposed the resistive FSS(Frequency Selective Surface) using printed metal mesh pattern on transparent glass with PEC(Perfect Electric Conductor) plane using ITO(Indium Thin Oxide) coating. We then fabricated the proposed structure to verify the simulation results obtained from commercial EM simulator. The comparisons between the simulation and measured results show good agreements. The results also show that the proposed radar absorbing structure can provide wideband reflection as well as better optical transparency. We can apply this proposed structure to the canopy of stealth aircraft and other stealth and security applications for visible transparency.

• Tribology and Lubricants
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• 제34권6호
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• pp.226-234
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• 2018

Copper chemical mechanical planarization (CMP) has become a key process in integrated circuit (IC) technology. The results of copper CMP depend not only on the mechanical abrasion, but also on the slurry chemistry. The slurry used for Cu CMP is known to have greater chemical reactivity than mechanical material removal. The Cu CMP slurry is composed of abrasive particles, an oxidizing agent, a complexing agent, and a corrosion inhibitor. Citric acid can be used as the complexing agent in Cu CMP slurries, and is widely used for post-CMP cleaning. Although many studies have investigated the effect of citric acid on Cu CMP, no studies have yet been conducted on the interfacial friction characteristics and step height reduction in CMP patterns. In this study, the effect of citric acid on the friction characteristics and step height reduction in a copper wafer with varying pattern densities during CMP are investigated. The prepared slurry consists of citric acid ($C_6H_8O_7$), hydrogen peroxide ($H_2O_2$), and colloidal silica. The friction force is found to depend on the concentration of citric acid in the copper CMP slurry. The step heights of the patterns decrease rapidly with decreasing citric acid concentration in the copper CMP slurry. The step height of the copper pattern decreases more slowly in high-density regions than in low-density regions.

• 한국재료학회지
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• 제29권9호
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• pp.532-541
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• 2019

Information and communication technologies are developing rapidly as IC chip size becomes smaller and information processing becomes faster. With this development, digital circuit technology is being widely applied to mobile phones, wireless LANs, mobile terminals, and digital communications, in which high frequency range of GHz is used. In high-density electronic circuits, issues of noise and EMC(Electro-Magnetic Compatibility) arising from cross talk between interconnects or devices should be solved. In this study, sheet-type electromagnetic wave absorbers that cause electromagnetic wave attenuation are fabricated using composites based on soft magnetic metal powder and silicon rubber to solve the problem of electromagnetic waves generated in wireless communication products operating at the frequency range of 2.4 GHz. Sendust(Fe-Si-Al) and carbonyl iron(Fe-C) were used as soft magnetic metals, and their concentrations and sheet thicknesses were varied. Using soft magnetic metal powder, a sheet is fabricated to exhibit maximum electromagnetic attenuation in the target frequency band, and a value of 34.2dB(99.9 % absorption) is achieved at the target frequency.

• 마이크로전자및패키징학회지
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• 제25권4호
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• pp.1-7
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• 2018

As the performance and density of IC (integrated circuit) devices increase, power and signal integrities in the global interconnects of advanced packaging technologies are becoming more difficult. Thus, the global interconnect technologies should be designed to accommodate increased input/output (I/O) counts, improved power grid network integrity, reduced RC delay, and improved electrical crosstalk stability. This requirement resulted in the fine-pitch interconnects with a low-k dielectric in 3D packaging or wafer level packaging structure. This paper reviews an organic-inorganic hybrid material as a potential dielectric candidate for the global interconnects. An organic-inorganic hybrid material called polysiloxane can provide spin process without high temperature curing, an excellent dielectric constant, and good mechanical properties.

• ETRI Journal
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• 제42권6호
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• pp.951-964
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• 2020

This paper presents a lightweight true random number generator (TRNG) using beta radiation that is useful for Internet of Things (IoT) security. In general, a random number generator (RNG) is required for all secure communication devices because random numbers are needed to generate encryption keys. Most RNGs are computer algorithms and use physical noise as their seed. However, it is difficult to obtain physical noise in small IoT devices. Since IoT security functions are required in almost all countries, IoT devices must be equipped with security algorithms that can pass the cryptographic module validation programs of each country. In this regard, it is very cumbersome to embed security algorithms, random number generation algorithms, and even physical noise sources in small IoT devices. Therefore, this paper introduces a lightweight TRNG comprising a thin-film beta-radiation source and integrated circuits (ICs). Although the ICs are currently being designed, the IC design was functionally verified at the board level. Our random numbers are output from a verification board and tested according to National Institute of Standards and Technology standards.

• 마이크로전자및패키징학회지
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• 제29권1호
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• pp.1-6
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• 2022

The mobile device industry demands much higher levels of integration and lower costs coupled with a growing awareness of the complete system's configuration. A subsystem module package is similar to a board-level circuit that integrates a system function in a package beyond a System-in-Package (SiP) design. It is an advanced IC packaging solution to enhance the PDN and achieve a smaller form factor. Unlike a system-level design with a decoupling capacitor, a subsystem module package system needs to redefine the role of the capacitor and its configuration for PDN performance. Specifically, the design of package's form factor should include careful consideration of optimal PDN performance and the number of components, which need to define the decoupling capacitor's value and the placement strategy for a low impedance profile with associated cost benefits. This paper will focus on both the static case that addresses the voltage (IR) drop and AC analysis in the frequency domain with three specific topics. First, it will highlight the role of simulation in the subsystem module design for the PDN. Second, it will compare the performance of double-sided component placement (DSCP) motherboards with the subsystem module package and then prove the advantage of the subsystem module package. Finally, it will introduce three-terminal decoupling capacitor (decap) configurations of capacitor size, count and value for the subsystem module package to determine the optimum performance and package density based on the cost-effective model.

• 한국표면공학회지
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• 제56권3호
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• pp.180-184
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• 2023

Scholars have proposed wafer-level bonding and three-dimensional (3D) stacked integrated circuit (IC) and have investigated Cu-Cu bonding to overcome the limitation of Moore's law. However, information about quantitative Cu-Cu direct-bonding conditions, such as temperature, pressure, and interfacial adhesion energy, is scant. This study determines the optimal temperature and pressure for Cu-Cu bonding by varying the bonding temperature to 100, 150, 200, 250, and 350 ℃ and pressure to 2,303 and 3,087 N/cm². Various conditions and methods for surface treatment were performed to prevent oxidation of the surface of the sample and remove organic compounds in Cu direct bonding as variables of temperature and pressure. EDX experiments were conducted to confirm chemical information on the bonding characteristics between the substrate and Cu to confirm the bonding mechanism between the substrate and Cu. In addition, after the combination with the change of temperature and pressure variables, UTM measurement was performed to investigate the bond force between the substrate and Cu, and it was confirmed that the bond force increased proportionally as the temperature and pressure increased.

• 한국정보통신학회논문지
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• 제2권4호
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• pp.545-551
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• 1998

SSB, VHF 등의 장비로 구성된 무선국의 통신시스템은 지금도 중요한 정보전달의 수단으로 이용되고 있으며, 무선국의 통신권을 확보하기 위하여 산악, 도서등의 원거리에 설치되는 장비는 전용회선을 사용하여 원격제어로 송·수신을 행하고 있다. 그러나 무선국에서 다수의 사용자가 다수의 장비에 임으로 접속하고 운용을 해야하는 환경에서는 ICS(Integrated Communication System:통합통신시스템)의 회선접속 제어기가 요구된다. 본 논문에서는 ICS의 개발을 위하여 ASK(Amplitude Shift Keying) 변조방식에 의한 U(Push To Talk) 제어와 신호의 전송회로를 구성하여 실험하였고, 멀티-프로세싱에 의한 회선접속 제어기를 설계하여 통합 통신운용에 대한 알고리즘을 연구하였다. Keying에 의하여 PTT 신호를 단속하였고 지속되는 PTT 신호에 음성신호를 합성시켜 전송시키는 형태의 ASK 변조방식을 취하여 전송되도록 하였고, 회선접속 제어기는 master와 다수의 slave 프로세서를 멀티-프로세싱의 직렬데이터 전송방식으로 프로세서 상호간에 데이타가 전달되도록 구성하였다. 이에 따른 S/W 는 멀티-프로세싱의 인터럽트기법을 최대한 활용하여 원하는 회선에 정확히 접속되어 통신이 이루어지도록 설계하였다. 따라서 이 연구는 주파수 자원의 고갈과 통신량의 증가에 대한 대책의 일환으로 저비용의 시설로 재래식 장비의 운용 효율을 증대시키는 기술을 개발하는데 목적이 있다.

• 대한전자공학회논문지SD
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• 제45권6호
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• pp.60-67
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• 2008

본 논문에서는 Bluetooth, Zigbee, WLAN 등 2.4GHz 대역 ISM-band 응용 분야를 위한 저 전력 주파수 합성기를 설계하였다. 저 전력 특성을 얻기 위해 전류소모가 큰 VCO, prescaler, ${\Sigma}-{\Delta}$ modulator 등의 전력소모를 최적화하는데 중점을 두고 설계하였다. VCO는 전력소모 측면에서 유리한 NP-core 유형의 구조를 선택하여 위상잡음 특성과 전력소모를 최적화하였으며, prescaler는 정적 전류소모가 거의 없는 동적 회로 기술이 적용된 D-F/F을 사용하여 전력소모를 줄였다. 또한 다수의 로직으로 구성되는 3차 ${\Sigma}-{\Delta}$ modulator는 'mapping circuit'으로 구조를 단순화하여 작은 면적과 저 전력소모 특성을 갖도록 하였다. $0.18{\mu}m$ CMOS 공정으로 IC를 제작하여 성능을 측정한 결과 설계된 주파수 합성기는 1.8V 전원전압에서 7.9mA의 전류를 소모하고, 100kHz offset에서 -96dBc/Hz, 1MHz offset에서 -118dBc/Hz의 위상 잡음 특성을 보였다 또한 spur 잡음 특성은 -70dBc이며, 25MHz step의 주파수 변화에 따른 위상 고정 시간은 약 $15{\mu}s$이다. 설계된 회로의 칩 면적은 pad를 포함하여 $1.16mm^2$이며 pad를 제외한 면적은 $0.64mm^2$이다.

• 한국전자파학회논문지
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• 제22권9호
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• pp.897-903
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• 2011

본 논문에서는 InGaP/GaAs hetero-junction bipolar transistor(HBT)를 이용하여 900 MHz에서 동작하는 1 W급 선형 전력 증폭기를 설계 및 검증하였다. 온도 변화에 따른 증폭기의 특성 변화를 최소화하기 위해 능동 바이어스 회로를 구성하였다. 전류 붕괴(current collapse)와 열 폭주(thermal runaway)를 방지하기 위하여 ballast 저항을 삽입하여 전력 증폭기의 성능 및 신뢰성을 최적화하였다. 제작된 선형 전력 증폭기는 중심 주파수 900 MHz의 one-tone 신호를 사용하였을 때, 17.6 dB의 전력 이득과 30 dBm의 OP1dB를 가지며, 이때 44.9 %의 PAE를 갖는다. 또한, two-tone 신호를 인가하였을 때, 20 dBm의 평균 출력 전력에서 47.3 dBm의 매우 높은 OIP3를 갖는다.