Browse > Article

Design of a Low-Power CMOS Fractional-N Frequency Synthesizer for 2.4GHz ISM Band Applications  

Oh, Kun-Chang (Dept. of Electronics Engineering, University of Incheon)
Kim, Kyung-Hwan (Dept. of Electronics Engineering, University of Incheon)
Park, Jong-Tae (Dept. of Electronics Engineering, University of Incheon)
Yu, Chong-Gun (Dept. of Electronics Engineering, University of Incheon)
Publication Information
Journal of the Institute of Electronics Engineers of Korea SD / v.45, no.6, 2008 , pp. 60-67 More about this Journal
Abstract
A low-power 2.4GHz fractional-N frequency synthesizer has been designed for 2.4GHz ISM band applications such as Bluetooth, Zigbee, and WLAN. To achieve low-power characteristic, the design has been focused on the power optimization of power-hungry blocks such as VCO, prescaler, and ${\Sigma}-{\Delta}$ modulator. An NP-core type VCO is adopted to optimize both phase noise and power consumption. Dynamic D-F/Fs with no static DC current are employed in designing the low-power prescaler circuit. The ${\Sigma}-{\Delta}$ modulator is designed using a modulus mapping circuit for reducing hardware complexity and power consumption. The designed frequency synthesizer which was fabricated using a $0.18{\mu}m$ CMOS process consumes 7.9mA from a single 1.8V supply voltage. The experimental results show that a phase noise of -118dBc/Hz at 1MHz offset, the reference spur of -70dBc at 25MHz offset, and the channel switching time of $15{\mu}s$ over 25MHz transition have been achieved. The designed chip occupies an area of $1.16mm^2$ including pads where the core area is only $0.64mm^2$.
Keywords
Fractional-N Frequency Synthesizer; PLL; Low-power; VCO; CMOS;
Citations & Related Records
연도 인용수 순위
  • Reference
1 D. Theil and C. Durdodt, "A fully integrated CMOS frequency synthesizer for Bluetooth," in Proc. IEEE RFIC Symposium, pp. 103-106, May 2001
2 김유환, 권덕기, 문요섭, 박종태, 유종근, "CMOS IF PLL 주파수합성기 설계," 대한전자공학회 논문지, 제40권, SD편, 제8호, pp.56-67, 2003
3 Moriaki Mizuno, "A 3-mW 1.0-GHz silicon-ECL dual-modulus prescaler IC," IEEE JSSC, vol. 27, no. 12, pp. 1794-1798, Dec. 1992
4 J. Bhattachaijee, D. Mukheijee, E. Gebara, S. Nuttinck, and J. Laskar, "A 5.8 GHz fully integrated low power low phase noise CMOS LC VCO for WLAN applications," in Proc. IEEE RFIC Symposium, pp.475-478, June 2002
5 C. L. Ti and T. H. Lin, "A 2.4-GHz 18-mW Two-Point Delta-Sigma Modulation Transmitter for IEEE 802.15.4," IEEE VLSI-DAT, pp. 188-191, April 2007
6 Dejan Mijuskovic, "Cell-based fully integrated CMOS frequency synthesizers," IEEE JSSC, vol. 29, no. 3, pp. 271-279, Mar. 1994
7 S-H. Kim, M-S. Keel, and K-W. Lee, "CMOS Delta-Sigma Frequency Synthesizer with a New Frequency Divider and a Simplified MASH Structure," Journal of the Korean Physical Society, vol. 41, no. 6, pp.967-973, Dec. 2002
8 J. W. M. Rogers and C. Plett, "Design and characterization of a 5.2GHz/2.4GHz $\Sigma$-$\Delta$ fractional-N frequency synthesizer for low-phase noise performance," EURASIP Jour. Wireless Communications and Networking, vol. 2006, pp.1-11, Jan. 2006
9 S. Pamarti, L. Jansson, and I. Galton, "A Wideband 2.4-GHz Delta-Sigma Fractional-N PLL with 1-Mb/s In-Loop Modulation," IEEE JSSC, vol. 39, no. 1, pp49-62, Jan. 2004
10 A. Hajimiri and T. Lee, "Design issues in CMOS differential LC oscillators," IEEE JSSC, vol. 34, no. 5, pp. 717-724, May 1999
11 S-H. Han, Y-S. Youn, and C-S. Kim, "Prescaler using complementary clocking dynamic flip-flop," Electronics Letters, vol. 39, no. 9, pp. 709-710, May. 2003   DOI   ScienceOn
12 B. Razavi, RF Microelectronics, Prentice Hall PTR, 1998