• Title/Summary/Keyword: Holding voltage

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Design of SCR-Based ESD Protection Circuit for 3.3 V I/O and 20 V Power Clamp

  • Jung, Jin Woo;Koo, Yong Seo
    • ETRI Journal
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    • v.37 no.1
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    • pp.97-106
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    • 2015
  • In this paper, MOS-triggered silicon-controlled rectifier (SCR)-based electrostatic discharge (ESD) protection circuits for mobile application in 3.3 V I/O and SCR-based ESD protection circuits with floating N+/P+ diffusion regions for inverter and light-emitting diode driver applications in 20 V power clamps were designed. The breakdown voltage is induced by a grounded-gate NMOS (ggNMOS) in the MOS-triggered SCR-based ESD protection circuit for 3.3 V I/O. This lowers the breakdown voltage of the SCR by providing a trigger current to the P-well of the SCR. However, the operation resistance is increased compared to SCR, because additional diffusion regions increase the overall resistance of the protection circuit. To overcome this problem, the number of ggNMOS fingers was increased. The ESD protection circuit for the power clamp application at 20 V had a breakdown voltage of 23 V; the product of a high holding voltage by the N+/P+ floating diffusion region. The trigger voltage was improved by the partial insertion of a P-body to narrow the gap between the trigger and holding voltages. The ESD protection circuits for low- and high-voltage applications were designed using $0.18{\mu}m$ Bipolar-CMOS-DMOS technology, with $100{\mu}m$ width. Electrical characteristics and robustness are analyzed by a transmission line pulse measurement and an ESD pulse generator (ESS-6008).

A Study on SCR-based Dual Directional ESD Protection Device with High Holding Voltage by Self-Biasing Effect (Self-Biasing 효과로 높은 홀딩 전압을 갖는 SCR 기반 양방향 ESD 보호 소자에 관한 연구)

  • Jung, Jang-Han;Jeong, Seung-Koo;Koo, Yong-Seo
    • Journal of IKEEE
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    • v.26 no.1
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    • pp.119-123
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    • 2022
  • This paper propose a new ESD protection device suitable for 12V class applications by adding a self-biasing structure to an ESD protection device with high holding voltage due to additional parasitic bipolar BJT. To verify the operating principle and electrical characteristics of the proposed device, current density simulation and HBM simulation were performed using Synopsys' TCAD Simulation, and the operation of the additional self-biasing structure was confirmed. As a result of the simulation, it was confirmed that the proposed ESD protection device has a higher level of holding voltage compared to the existing ESD protection device. It is expected to have high area efficiency due to the dual structure and sufficient latch-up immunity in 12V-class applications.

A Study on ESD Protection Circuit with Bidirectional Structure with Latch-up Immunity due to High Holding Voltage (높은 홀딩 전압으로 인한 래치업 면역을 갖는 양방향 구조의 ESD 보호회로에 관한 연구)

  • Jung, Jang-Han;Do, Kyung-Il;Jin, Seung-Hoo;Go, Kyung-Jin;Koo, Yong-Seo
    • Journal of IKEEE
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    • v.25 no.2
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    • pp.376-380
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    • 2021
  • In this paper, we propose a novel ESD protection device with Latch-up immunity properties due to high holding voltages by improving the structure of a typical SCR. To verify the characteristics of the proposed ESD circuit, simulations were conducted using Synopsys TCAD and presented compared to existing ESD protection circuits. Furthermore, the variation of electrical properties was verified using the design variable D1. Simulation results confirm that the proposed ESD protective circuit has higher holding voltage properties and bidirectional discharge properties compared to conventional ESD protective circuits. We validate the electrical properties with post-design TLP measurements using Samsung's 0.13um BCD process. And we verify that the proposed ESD protection circuit in this paper is well suited for high voltage applications in that it has a latch-up immunity due to improved holding voltage through optimization of design variables.

A study on SCR-based bidirectional ESD protection device with high holding voltage due to parallel NPN BJT (Parallel NPN BJT로 인한 높은 홀딩 전압을 갖는 SCR 기반 양방향 ESD 보호 소자에 관한 연구)

  • Jung, Jang-Han;Woo, Je-Wook;Koo, Yong-Seo
    • Journal of IKEEE
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    • v.25 no.4
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    • pp.735-740
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    • 2021
  • In this paper, we propose a new ESD protection device with high holding voltage with low current gain of parasitic NPN BJT by improving the structure of the existing LTDDSCR. The electrical characteristics of the proposed protection device were analyzed by HBM simulation using Synopsys' TCAD simulation, and the operation of the added BJT was confirmed by current flow, impact ionization and recombination simulation. In addition, the holding voltage characteristics were optimized with the design variables D1 and D2. As a result of the simulation, it was verified that the new ESD protection device has a higher holding voltage compared to the existing LTDDSCR and has a symmetrical bidirectional characteristic. Therefore, the proposed ESD protection device has high area efficiency when applied to an IC and is expected to improve the reliability of the IC.

Simulation-based P-well design for improvement of ESD protection performance of P-type embedded SCR device

  • Seo, Yong-Jin
    • Journal of IKEEE
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    • v.26 no.2
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    • pp.196-204
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    • 2022
  • Electrostatic discharge (ESD) protection devices of P-type embedded silicon-controlled rectifier (PESCR) structure were analyzed for high-voltage operating input/output (I/O) applications. Conventional PESCR standard device exhibits typical SCR characteristics with very low-snapback holding voltages, resulting in latch-up problems during normal operation. However, the modified device with the counter pocket source (CPS) surrounding N+ source region and partially formed P-well (PPW) structures proposed in this study could improve latch-up immunity by indicating high on-resistance and snapback holding voltage.

A Study on the Electrical Characteristic of SCR-based Dual-Directional ESD Protection Circuit According to Change of Design Parameters (SCR 기반 양방향성 ESD보호회로의 설계 변수 변화에 따른 전기적 특성의 관한 연구)

  • Kim, Hyun-Young;Lee, Chung-Kwang;Nam, Jong-Ho;Kwak, Jae-Chang;Koo, Yong-Seo
    • Journal of IKEEE
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    • v.19 no.2
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    • pp.265-270
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    • 2015
  • In this paper, we proposed a dual-directional SCR (silicon-controlled rectifier) based ESD (electrostatic discharge) protection circuit. In comparison with conventional SCR, this ESD protection circuit can provide an effective protection against ESD pulses in the two opposite directions, so the ESD protection circuit can be discharged in two opposite direction. The proposed circuit has a higher holding voltage characteristic than conventional SCR. These characteristic enable to have latch-up immunity under normal operating conditions as well as superior full chip ESD protection. it was analyzed to figure out electrical characteristics in term of individual design parameters. They are investigated by using the Synopsys TCAD simulator. In the simulation results, it has trigger voltage of 6.5V and holding voltage increased with different design parameters. The holding voltage of the proposed circuit changes from 2.1V to 6.3V and the proposed circuit has symmetrical I-V characteristic for positive and negative ESD pulse.

Optimal P-Well Design for ESD Protection Performance Improvement of NESCR (N-type Embedded SCR) device (NESCR 소자에서 정전기 보호 성능 향상을 위한 최적의 P-Well 구조 설계)

  • Yang, Jun-Won;Seo, Yong-Jin
    • Journal of Satellite, Information and Communications
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    • v.9 no.3
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    • pp.15-21
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    • 2014
  • An electrostatic discharge (ESD) protection device, so called, N-type embedded silicon controlled rectifier (NESCR), was analyzed for high voltage operating I/O applications. A conventional NESCR standard device shows typical SCR-like characteristics with extremely low snapback holding voltage, which may cause latch-up problem during normal operation. However, our modified NESCR_CPS_PPW device with proper junction/channel engineering such as counter pocket source (CPS) and partial P-well structure demonstrates highly latch-up immune current-voltage characteristics with high snapback holding voltage and on-resistance.

A Study on SCR of New Structure with High Holding Voltage Characteristics by Applying Series Connected-NPN and N-Stack Technology (Series Connected-NPN 및 N-Stack기술 적용을 통하여 높은 홀딩전압특성을 갖는 새로운 구조의 SCR에 관한 연구)

  • Seo, Jeong-Ju;Kwon, Sang-Wook;Do, Kyoung-Il;Lee, Byung-Seok;Koo, Yong-Seo
    • Journal of IKEEE
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    • v.23 no.1
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    • pp.338-341
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    • 2019
  • In this paper, we propose a novel ESD device with improved characteristics of LVTSCR, which is a representative ESD protection device, and verify the N-stack technology for design optimized for each required voltage of a specific application. The characteristics of the holding voltage and the trigger voltage, which are the main parameters, are examined and the temperature characteristic, which is an indicator of the tolerance characteristic, is also verified. well region and a parasitic NPN to form a series-connected structure. We used synopsys' T-cad simulation tool for characterization.

Cathode Side Engineering to Raise Holding Voltage of SCR in a 0.5-㎛ 24 V CDMOS Process

  • Wang, Yang;Jin, Xiangliang;Zhou, Acheng;Yang, Liu
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.15 no.6
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    • pp.601-607
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    • 2015
  • A set of novel silicon controlled rectifier (SCR) devices' characteristics have been analyzed and verified under the electrostatic discharge (ESD) stress. A ring-shaped diffusion was added to their anode or cathode in order to improve the holding voltage (Vh) of SCR structure by creating new current discharging path and decreasing the emitter injection efficiency (${\gamma}$) of parasitic Bipolar Junction Transistor (BJT). ESD current density distribution imitated by 2-dimensional (2D) TCAD simulation demonstrated that an additional current path exists in the proposed SCR. All the related devices were investigated and characterized based on transmission line pulse (TLP) test system in a standard $0.5-{\mu}m$ 24 V CDMOS process. The proposed SCR devices with ring-shaped anode (RASCR) and ring-shaped cathode (RCSCR) own higher Vh than that of Simple SCR (S_SCR). Especially, the Vh of RCSCR has been raised above 33 V. What's more, their holding current is kept over 800 mA, which makes it possible to design power clamp with SCR structure for on chip ESD protection and keep the protected chip away from latch-up risk.

A Study on the Voltage Holding Ratio and Residual DC Property in the IPS Cell (IPS 셀의 전압보유율 및 잔류 DC 특성에 관한 연구)

  • Jeon, Yong-Je;Kim, Hyang-Yul;Seo, Dae-Shik;Kim, Jae-Hyung;Nam, Sang-Hee
    • Proceedings of the KIEE Conference
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    • 2001.11a
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    • pp.174-177
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    • 2001
  • The voltage holding ratio (VHR) and Residual DC property in the in-plane switching (IPS) cell was studied Several IPS cells which have different concentrations of cynao liquid crystals (LCs) and different resistivities of fluorine LCs were fabricated VHR and residual DC voltage in the IPS cells using the capacitance-voltage (C-V) hysteresis method was measured. We found that the VHR of the IPS cell was decreasing with increasing concentration of cyano LC. The residual DC voltage of the IPS cell was decreasing with increasing concentration of cyano LCs. We suggest that the high polarity of cyano LC helps reducing the residual DC voltage.

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