• Title/Summary/Keyword: High-k thin film transistor

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Schottky barrier polycrystalline silicon thin film transistor by using platinum-silicided source and drain (플레티늄-실리사이드를 이용한 쇼트키 장벽 다결정 박막 트랜지스터트랜지스터)

  • Shin, Jin-Wook;Choi, Chel-Jong;Chung, Hong-Bay;Jung, Jong-Wan;Cho, Won-Ju
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.11a
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    • pp.80-81
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    • 2008
  • Schottky barrier thin film transistors (SB-TFT) on polycrystalline silicon(poly-Si) are fabricated by platinum silicided source/drain for p-type SB-TFT. High quality poly-Si film were obtained by crystallizing the amorphous Si film with excimer laser annealing (ELA) or solid phase crystallization (SPC) method. The fabricated poly-Si SB-TFTs showed low leakage current level and a large on/off current ratio larger than $10^5$. Significant improvement of electrical characteristics were obtained by the additional forming gas annealing in 2% $H_2/N_2$ ambient, which is attributed to the termination of dangling bond at the poly-Si grain boundaries as well as the reduction of interface trap states at gate oxide/poly-Si channel.

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A Research About P-type Polycrystalline Silicon Thin Film Transistors of Low Temperature with Metal Gate Electrode and High Temperature with Gate Poly Silicon (실리콘 게이트전극을 갖는 고온소자와 금속 게이트전극을 갖는 P형 저온 다결정 실리콘 박막 트랜지스터의 전기특성 비교 연구)

  • Lee, Jin-Min
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.24 no.6
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    • pp.433-439
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    • 2011
  • Poly Si TFTs (poly silicon thin film transistors) with p channel those are annealed HT (high temperature) with gate poly crystalline silicon and LT (low temperature) with metal gate electrode were fabricated on quartz substrate using the analyzed data and compared according to the activated grade silicon thin films and the size of device channel. The electrical characteristics of HT poly-Si TFTs increased those are the on current, electron mobility and decrease threshold voltage by the quality of particles of active thin films annealed at high temperature. But the on/off current ratio reduced by increase of the off current depend on the hot carrier applied to high gate voltage. Even though the size of the particles annealed at low temperature are bigger than HT poly-Si TFTs due to defect in the activated grade poly crystal silicon and the grain boundary, the characteristics of LT poly-Si TFTs were investigated deterioration phenomena those are decrease the electric off current, electron mobility and increase threshold voltage. The results of transconductance show that slope depend on the quality of particles and the amplitude depend on the size of the active silicon particles.

a- Si:H TFT Level Shifter with Reduced Number of Power

  • Jeong, Nam-Hyun;Chun, Young-Tea;Kim, Jung-Woo;Bae, Byung-Seong
    • 한국정보디스플레이학회:학술대회논문집
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    • 2008.10a
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    • pp.20-23
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    • 2008
  • We proposed a-Si:H TFT (hydrogenated amorphous silicon thin film transistor) level shifter which reduced number of power sources. To reduce the number of power sources from four to two, modified bootstrapped inverter was used for the level shifter. The shift register was verified by PSPICE circuit simulation and fabricated. The fabricated level shifter successfully shifted low input (0 to 5 V) to high level output (-7 to 23 V).

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A Review : Improvement of Operation Current for Realization of High Mobility Oxide Semiconductor Thin-film Transistors (고이동도 산화물 반도체 박막 트랜지스터 구현을 위한 구동전류 향상)

  • Jang, Kyungsoo;Raja, Jayapal;Kim, Taeyong;Kang, Seungmin;Lee, Sojin;Nguyen, Thi Cam Phu;Than, Thuy Trinh;Lee, Youn-Jung;Yi, Junsin
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.28 no.6
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    • pp.351-359
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    • 2015
  • Next-generation displays should be transparent and flexible as well as having high resolution and frame number. The main factor for active matrix organic light emitting diode and next-generation displays is the development of TFTs (thin-film transistors) with high mobility and large area uniformity. The TFTs used for transparent displays are mainly oxide TFT that has oxide semiconductor as channel layer. Zinc-oxide based substances such as indium-gallium-zinc-oxide has attracted attention in the display industry. In this paper, the mobility improvement of low cost oxide TFT is studied for fast operating next-generation displays by overcoming disadvantages of amorphous silicon TFT that has low mobility and poly silicon TFT that requires expensive equipment for complex process and doping process.

Synthesis and Characterization of Perylene-based Pyrrolopyrone Derivative for Organic Thin Film Transistor

  • Kim, Hyung-Sun;Jung, Sung-Ouk;Kim, Yun-Hi;Do, Lee-Mi;Kwon, Soon-Ki
    • Journal of Information Display
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    • v.6 no.4
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    • pp.1-5
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    • 2005
  • Perylene-based pyrrolopyrone derivative (PPD) was synthesized via condensation reaction with perylenetetracarboxylic dianhydride and 1,2-phenylenediarnine as n-type channel material. The structure of PPD was characterized by spectroscopic methods such FT-IR and $^1H$-NMR. PPD exhibited high thermal stability ($T_{d5wt%}: 560^{\circ}C$) and was found to be soluble only in protonic solvents with high acidity such as methane sulfonic acid and trifluoroacetic acid. The PPD solution showed maximum absorption and emission at 601 and 628 nm, respectively. Thin film transistors were fabricated by vacuum deposition and solution casting method. The electron mobilities of the devices were achieved as high as $0.17{\times}10^{-6}cm^2/Vs$ for vacuum deposited device and $0.4{\times}10^{-6}cm^2/Vs$ for spin coated device, respectively.

Advances in Zinc Oxide-Based Devices for Active Matrix Displays

  • Mann, Mark;Li, Flora;Kiani, Ahmed;Paul, Debjani;Flewitt, Andrew;Milne, William;Dutson, James;Wakeham, Steve J.;Thwaites, Mike
    • 한국정보디스플레이학회:학술대회논문집
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    • 2009.10a
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    • pp.389-392
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    • 2009
  • Metal oxides have been proposed as an alternative channel material to hydrogenated amorphous silicon in thin film transistors (TFTs) because their higher mobility and stability make them suitable for transistor active layers. Thin films of indium zinc oxide (IZO) were deposited using a High Target Utilization Sputtering (HiTUS) system on various dielectrics, some of which were also deposited with the HiTUS. Investigations into bottom-gated IZO TFTs have found mobilities of 8 $cm^2V\;^1s^{-1}$ and switching ratios of $10^6$. There is a variation in the threshold voltage dependent on both oxygen concentration, and dielectric choice. Silica, alumina and silicon nitride produced stable TFTs, whilst hafnia was found to break down as a result of the IZO.

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A prototype active-matrix field emission display with poly-Si field emitter arrarys and thin-film transistors

  • Song, Yoon-Ho;Lee, Jin-Ho;Kang, Seung-Youl;Park, Sng-Yool;Suh, Kyung-Soo;Park, Mun-Yang;Cho, Kyoung-Ik
    • Journal of Korean Vacuum Science & Technology
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    • v.3 no.1
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    • pp.33-37
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    • 1999
  • We present, for the first time, a prototype active-matrix field emission display (AMFED) with 25$\times$25 pixels in which polycrystalline silicon fie이 emitter array (poly-Si FEA) and thin-film transistor (TFT) were monolityically intergrated on an insulating substrate. The FEAs showed relatively large electron emissions above at a gate voltage of 50 V, and the TFTs were designed to have low off-stage currents even though at high drain voltages. The intergrated poly-Si TFT controlled electron emissions of the poly-Si FEA actively, resulting in improvement in the emission stability and reliability along with a low-voltage control of field emission below 25V. With the prototype AMFED we have displayed character patterns by low-boltage pertipheral circuits of 15 V in a high vacuum chamber.

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Low voltage operating $InGaZnO_4$ thin film transistors using high-k $MgO_{0.3}BST_{0.7}$ gate dielectric (고유전 $MgO_{0.3}BST_{0.7}$ 게이트 절연막을 이용한 $InGaZnO_4$ 기반의 트랜지스터의 저전압 구동 특성 연구)

  • Kim, Dong-Hun;Cho, Nam-Gyu;Chang, Young-Eun;Kim, Ho-Gi;Kim, Il-Doo
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.11a
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    • pp.40-40
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    • 2008
  • $InGaZnO_4$ based thin film transistors (TFTs) are of interest for large area and low cost electronics. The TFTs have strong potential for application in flat panel displays and portable electronics due to their high field effect mobility, high on/off current ratios, and high optical transparency. The application of such room temperature processed transistors, however, is often limited by the operation voltage and long-tenn stability. Therefore, attaining an optimum thickness is necessary. We investigated the thickness dependence of a room temperature grown $MgO_{0.3}BST_{0.7}$ composite gate dielectric and an $InGaZnO_4$ (IGZO) active semiconductor on the electrical characteristics of thin film transistors fabricated on a polyethylene terephthalate (PET) substrate. The TFT characteristics were changed markedly with variation of the gate dielectric and semiconductor thickness. The optimum gate dielectric and active semiconductor thickness were 300 nm and 30 nm, respectively. The TFT showed low operating voltage of less than 4 V, field effect mobility of 21.34 cm2/$V{\cdot}s$, an on/off ratio of $8.27\times10^6$, threshold voltage of 2.2 V, and a subthreshold swing of 0.42 V/dec.

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High Performance p-type SnO thin-film Transistor with SiOx Gate Insulator Deposited by Low-Temperature PECVD Method

  • U, Myeonghun;Han, Young-Joon;Song, Sang-Hun;Cho, In-Tak;Lee, Jong-Ho;Kwon, Hyuck-In
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.14 no.5
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    • pp.666-672
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    • 2014
  • We have investigated the gate insulator effects on the electrical performance of p-type tin monoxide (SnO) thin-film transistors (TFTs). Various SnO TFTs are fabricated with different gate insulators of a thermal $SiO_2$, a plasma-enhanced chemical vapor deposition (PECVD) $SiO_x$, a $150^{\circ}C$-deposited PEVCD $SiO_x$, and a $300^{\circ}C$-deposited PECVD $SiO_x$. Among the devices, the one with the $150^{\circ}C$-deposited PEVCD $SiO_x$ exhibits the best electrical performance including a high field-effect mobility ($=4.86cm^2/Vs$), a small subthreshold swing (=0.7 V/decade), and a turn-on voltage around 0 (V). Based on the X-ray diffraction data and the localized-trap-states model, the reduced carrier concentration and the increased carrier mobility due to the small grain size of the SnO thin-film are considered as possible mechanisms, resulting in its high electrical performance.

Ultra low temperature polycrystalline silicon thin film transistor using sequential lateral solidification and atomic layer deposition techniques

  • Lee, J.H.;Kim, Y.H.;Sohn, C.Y.;Lim, J.W.;Chung, C.H.;Park, D.J.;Kim, D.W.;Song, Y.H.;Yun, S.J.;Kang, K.Y.
    • 한국정보디스플레이학회:학술대회논문집
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    • 2004.08a
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    • pp.305-308
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    • 2004
  • We present a novel process for the ultra low temperature (<150$^{\circ}C$) polycrystalline silicon (ULTPS) TFT for the flexible display applications on the plastic substrate. The sequential lateral solidification (SLS) was used for the crystallization of the amorphous silicon film deposited by rf magnetron sputtering, resulting in high mobility polycrystalline silicon (poly-Si) film. The gate dielectric was composed of thin $SiO_2$ formed by plasma oxidation and $Al_2O_3$ deposited by plasma enhanced atomic layer deposition. The breakdown field of gate dielectric on poly-Si film showed above 6.3 MV/cm. Laser activation reduced the source/drain resistance below 200 ${\Omega}$/ㅁ for n layer and 400 ${\Omega}$/ㅁ for p layer. The fabricated ULTPS TFT shows excellent performance with mobilities of 114 $cm^2$/Vs (nMOS) and 42 $cm^2$/Vs (pMOS), on/off current ratios of 4.20${\times}10^6$ (nMOS) and 5.7${\times}10^5$ (PMOS).

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