• Journal of the Institute of Electronics Engineers of Korea SD
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• v.39 no.9
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• pp.19-27
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• 2002

Characteristics of interconnect lines considering underlayer geometries of a silicon substrate and crossing metal lines are experimentally analyzed through elaborately devised patterns. In this work, test patterns for transmission lines having several kinds of underlayer geometries were devised, and the signal characteristics and responses are measured by S-parameter and time domain reflection meter (TDR). The patterns were designed and fabricated with a deep-submicron CMOS DRAM technology having 1 Tungsten and 2 Aluminum metals. From the analysis of measured results on the patterns, it is founded that the effects of underlayter line structures on line parameters (especially line capacitance and resistance) and signal distortions occurred from them cannot be negligible. The results provide useful and insightful understanding in the skew balance of package leads and global signal lines such as high-speed clock and data lines.

• Journal of the Korean Society of Surveying, Geodesy, Photogrammetry and Cartography
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• v.39 no.6
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• pp.491-496
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• 2021

In line with the modern era in which the safety of underground facilities and the use of underground information are increasingly emphasized, the state is pushing for more precise and accurate underground spatial information to be secured and utilized. Therefore, we need to pay more attention to subsurface geospatial data. In the future, the Ministry of Land, Infrastructure and Transport will actively utilize the 15 types of Integrated Underground Geospatial Information Map(6 types of underground facilities, 6 types of underground structures, 3 types of ground) that the Ministry of Land, Infrastructure and Transport is building as three-dimensional underground spatial information, and contribute greatly to improving national safety and convenience in underground construction. expected to do However, when a site manager requests an Integrated Underground Geospatial Information Map with a mobile device, if the large-capacity integrated underground space map is not quickly transmitted over the wireless section and is not serviced, it causes inconvenience to the site manager and delays work. In this paper, the goal of this paper is to enable field managers to quickly receive a tiled Integrated Underground Geospatial Information Map with minimal information exchange. Therefore, the tiling system is configured according to the dataset for high-speed Mobile Integrated Underground Geospatial Information Map transmission. In addition, a transmission system for the Mobile Integrated Underground Geospatial Information Map is established, and a TCP/IP (Transmission Control Protocol/Internet Protocol)-based spatial information tiling transmission protocol dedicated to the on-site Integrated Underground Geospatial Information Map is developed.

• Journal of Welding and Joining
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• v.30 no.4
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• pp.38-43
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• 2012

Using a fiber laser heat source, an oil pressure sensor was fabricated to measure the pressure in commercial vehicles. A stepping motor was used for the rotational and translational motion in the diaphragms and hardware joining. Laser welding process algorism including shielding gas control and vision system was integrated by using LabVIEW software for the high quality welding and in-line monitoring purpose. For the maximum flexibility in pressure transmission to the pressure sensor, thin sheet metal diaphragm, $25{\sim}50{\mu}m$(SUS-316L), was used and the diaphragms were optimally designed with FEM analysis. The welded samples were cross-sectioned the observation showed that the maximum depth ratio was more than seven times of diaphragms. The maximum welding speed was measured to be as high as 50in/mm by the developed automation mechanism. The fabricated prototypes were tested for the proof pressure, spring constant and sealing. The FEM results of spring constant measurement was as accurate as up to 80% of the design value and the sensor was safely operated up to the nominal pressure of 10bars.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.5 s.335
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• pp.31-38
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• 2005

The architecture and the implementation details of a UTMI(USB2.0 Transceiver Macrocell Interface) compatible USB2.0 transceiver chip were presented. To confirm the validation of the incoming data in noisy channel environment, a squelch state detector and a current mode Schmitt-trigger circuit were proposed. A current mode output driver to transmit 480Mbps data on the USB cable was designed and an on-die termination(ODT) which is controlled by a replica bias circuit was presented. In the USB system using plesiochronous clocking, to compensate for the frequency difference between a transmitter and a receiver, a synchronizer using clock data recovery circuit and FIFO was designed. The USB cable was modeled as the lossy transmission line model(W model) for circuit simulation by using a network analyzer measurements. The USB2.0 PHY chip was implemented by using 0.25um CMOS process and test results were presented. The core area excluding the IO pads was $0.91{\times}1.82mm^2$. The power consumptions at the supply voltage of 2.5V were 245mW and 150mW for high-speed and full-speed operations, respectively.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.11 no.11
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• pp.2021-2026
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• 2007

In the parer, we design a non-coherent UWB system by adopting the architecture of a simplified asynchronous transmission and the edge-triggered pulse transmission, which makes e system performance independent of the share of the transmitted waveform, robust to multipath channels. The designed non-coherent UWB transceiver architecture has an advantage of the simple realization since any mixer, high-speed correlator, and high-sampling A/D converter are not necessary at the cost of performance degradation of about 3dB. Further, the designed non-coherent UWB transceiver is actually implemented with the wireless CANVAS prototype testbed in short range indoor application environments such as a lecture room. The implemented prototype testbed is proven to offer the data rate of 115kbps on the conditions of Peer-to-Peer(P-to-P) in the indoor channel within the range of about 10m.

• Journal of Advanced Navigation Technology
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• v.27 no.4
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• pp.410-416
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• 2023

Unlike geostationary satellite communication systems, low-earth orbit(LEO) satellite communication systems move at relatively high speeds, and the angle with the ground device is not fixed and varies over a wide range. The propagation channel condition between satellites and ground nodes cannot be assumed line of sight(LOS) anymore. This paper analyzes the low-orbit multi-path fading satellite channel model that can occur in LEO satellite communication systems and Doppler frequency transition caused by high-speed maneuvering of LEO satellites and presents effective equalization techniques for OFDM and SC-FDE transmission methods suitable for multi-path frequency selective fading satellite channel models. In addition, this paper compares and analyzes the performance of OFDM and SC-FDE transmission methods in multipath fading LEO satellite channel environment using the proposed equalization techniques through simulations. Simulation results showed that SC-FDE outpeformed OFDM.

• The KIPS Transactions:PartA
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• v.10A no.3
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• pp.247-254
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• 2003

This paper describes a Delay Locked Loop (DLL) with low supply voltage and wide lock range for Synchronous DRAM which employs Double Data Rate (DDR) technique for faster data transmission. To obtain high resolution and fast lock-on time, a new type of phase detector is designed. The new counter and lock indicator structure are suggested based on the Dual-clock dual-data Flip Flop (DCDD FF). The DCDD FF reduces the size of counter and lock indicator by about 70%. The delay line is composed of coarse and fine units. By the use of fast phase detector, the coarse delay line can detect minute phase difference of 0.2 nsec and below. Aided further by the new type of 3-step vernier fine delay line, this DLL circuit achieves unprecedented timing resolution of 25psec. This DLL spans wide locking range from 500MHz to 500MHz and generates high-speed clocks with fast lock-on time of less than 5 clocks. When designed using 0.25 um CMOS technology with 1.8V supply voltage, the circuit consumes 32mA at 500MHz locked condition. This circuit can be also used for other applications as well, such as synchronization of high frequency communication systems.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.39C no.3
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• pp.291-297
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• 2014

Due to the rapid increase in demand for transportation of human and freight in modern railway systems, the CBTC system has been proposed, which is the solution for improvement of the line capacity that has been limited by the conventional track circuit based train control system. In the CBTC system, higher reliability of the communication system should be guaranteed for the safety of passengers and trains. However, due to the inherent characteristics of the wireless channel environment, performance degradations are inevitable. The diversity techniques can increase the reliability of data transmission using multiple antennas. In this paper, we investigate the performance of the STBC in the railway channel environment. Rician fading model is used for the viaduct scenarios which take important roles in the railway system. Also, considered is the Doppler effect which is an important factor in the mobile communication system. Simulations are performed to analyze the performance of the STBC in various channel environments. Results show that the performance degradation due to the phase error in viaduct scenarios is independent of the diversity order but is affected by the constellation of the modulation.

• Journal of the Korean Society for Railway
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• v.19 no.1
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• pp.38-45
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• 2016

The power transformation system of High Speed rolling stocks like KTX-Sancheon has shown excellent control capacities in the areas of riding comfortability, switching efficiency, safety and energy consumption due to technical developments in power-electronics, high speed & large scale integrated semiconductors and microprocessors. However, harmonics from IGBT, a high speed switching device used in the Convertor & Invertor equipment of rolling stocks have given rise to various problems in transformer substations, signaling systems, data transmission systems and facility monitoring systems. Especially, TI21 non-insulated track circuits have malfunctioned due to the influence of returning current harmonics which were generated at around of integer times of the number of power transformation equipment in the frequency domain. This paper, measures and analyzes various schemes to analyze the traveling path of the returning current harmonics generated due to the relationship between the rolling stocks and track circuits on site. Ultimately, theseschemes will be used to design high speed rolling stocks, AF track circuits and a common grounding network.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.12 no.5
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• pp.879-886
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• 2008

This paper addresses the analysis and the design optimization of differential interconnects for Low-Voltage Differential Signaling (LVDS) applications. Thanks to the differential transmission and the low voltage swing, LVDS offers high data rates and improved noise immunity with significantly reduced power consumption in data communications, high-resolution display, and flat panel display. We present an improved model and new equations to reduce impedance mismatch and signal degradation in cascaded interconnects using optimization of interconnect design parameters such as trace width, trace height and trace space in differential flexible printed circuit board (FPCB) transmission lines. We have carried out frequency-domain full-wave electromagnetic simulations, time-domain transient simulations, and S-parameter simulations to evaluate the high-frequency characteristics of the differential FPCB interconnects. The 10% change in trace width produced change of approximately 6% and 5.6% in differential impedance for trace thickness of $17.5{\mu}m$ and $35{\mu}m$, respectively. The change in the trace space showed a little change. We believe that the proposed approach is very helpful to optimize high-speed differential FPCB interconnects for LVDS applications.