• Title/Summary/Keyword: High voltage gain

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A 32 nm NPN SOI HBT with Programmable Power Gain and 839 GHzV ftBVCEO Product

  • Misra, Prasanna Kumar;Qureshi, S.
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.14 no.6
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    • pp.712-717
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    • 2014
  • The performance of npn SiGe HBT on thin film SOI is investigated at 32 nm technology node by applying body bias. An n-well is created underneath thin BOX to isolate the body biased SOI HBT from SOI CMOS. The results show that the HBT voltage gain and power gain can be programmed by applying body bias to the n-well. This HBT can be used in variable gain amplifiers that are widely used in the receiver chain of RF systems. The HBT is compatible with 32 nm FDSOI technology having 10 nm film thickness and 30 nm BOX thickness. As the breakdown voltage increases by applying the body bias, the SOI HBT with 3 V $V_{CE}$ has very high $f_tBV_{CEO}$ product (839 GHzV). The self heating performance of the proposed SOI HBT is studied. The high voltage gain and power gain (60 dB) of this HBT will be useful in designing analog/RF systems which cannot be achieved using 32 nm SOI CMOS (usually voltage gain is in the range of 10-20 dB).

A High Voltage CMOS Rail-to-Rail Input/Output Operational Amplifier with Gain enhancement (전압 이득 향상을 위한 고전압 CMOS Rail-to-Rail 입/출력 OP-AMP 설계)

  • An, Chang-Ho;Lee, Seung-Kwon;Jun, Young-Hyun;Kong, Bai-Sun
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.10
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    • pp.61-66
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    • 2007
  • A gain enhancement rail-to-rail buffer amplifier for liquid crystal display (LCD) source driver is proposed. An op-amp with extremely high gain is needed to decrease the offset voltage of the buffer amplifier. Cascoded floating current source and class-AB control block in the op-amp achieve a high voltage gain by reducing the channel length modulation effect in high voltage technologies. HSPICE simulation in $1\;{\mu}V$ 15 V CMOS process demonstrates that voltage gain is increased by 30 dB. The offset voltage is improved from 6.84 mV to $400\;{\mu}V$. Proposed op-amp is fabricated in an LCD source driver IC and overall system offset voltage is decreased by 2 mV.

Novel Predictive Maximum Power Point Tracking Techniques for Photovoltaic Applications

  • Abdel-Rahim, Omar;Funato, Hirohito;Haruna, Junnosuke
    • Journal of Power Electronics
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    • v.16 no.1
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    • pp.277-286
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    • 2016
  • This paper offers two Maximum Power Point Tracking (MPPT) systems for Photovoltaic (PV) applications. The first MPPT method is based on a fixed frequency Model Predictive Control (MPC). The second MPPT technique is based on the Predictive Hysteresis Control (PHC). An experimental demonstration shows that the proposed techniques are fast, accurate and robust in tracking the maximum power under different environmental conditions. A DC/DC converter with a high voltage gain is obligatory to track PV applications at the maximum power and to boost a low voltage to a higher voltage level. For this purpose, a high gain Switched Inductor Quadratic Boost Converter (SIQBC) for PV applications is presented in this paper. The proposed converter has a higher gain than the other transformerless topologies in the literature. It is shown that at a high gain the proposed SIQBC has moderate efficiency.

A Fast Low Dropout Regulator with High Slew Rate and Large Unity-Gain Bandwidth

  • Ko, Younghun;Jang, Yeongshin;Han, Sok-Kyun;Lee, Sang-Gug
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.13 no.4
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    • pp.263-271
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    • 2013
  • A low dropout regulator (LDO) with fast transient responses is presented. The proposed LDO eliminates the trade-off between slew rate and unity gain bandwidth, which are the key parameters for fast transient responses. In the proposed buffer, by changing the slew current path, the slew rate and unity gain bandwidth can be controlled independently. Implemented in $0.18-{\mu}m$ high voltage CMOS, the proposed LDO shows up to 200 mA load current with 0.2 V dropout voltage for $1{\mu}F$ output capacitance. The measured maximum transient output voltage variation, minimum quiescent current at no load condition, and maximum unity gain frequency are 24 mV, $7.5{\mu}A$, and higher than 1 MHz, respectively.

A Three-Phase AC-DC High Step-up Converter for Microscale Wind-power Generation Systems

  • Yang, Lung-Sheng;Lin, Chia-Ching;Chang, En-Chih
    • Journal of Power Electronics
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    • v.16 no.5
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    • pp.1861-1868
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    • 2016
  • In this paper, a three-phase AC-DC high step-up converter is developed for application to microscale wind-power generation systems. Such an AC-DC boost converter prossessess the property of the single-switch high step-up DC-DC structure. For power factor correction, the advanced half-stage converter is operated under the discontinuous conduction mode (DCM). Simulatanously, to achieve a high step-up voltage gain, the back half-stage functions in the continuous conduction mode (CCM). A high voltage gain can be obtained by use of an output-capacitor mass and a coupled inductor. Compared to the output voltage, the voltage stress is decreased on the switch. To lessen the conducting losses, a low rated voltage and small conductive resistance MOSFETs are adopted. In addition, the coupled inductor retrieves the leakage-inductor energy. The operation principle and steady-state behavior are analyzed, and a prototype hardware circuit is realized to verify the performance of the proposed converter.

Effect of Subthreshold Slope on the Voltage Gain of Enhancement Mode Thin Film Transistors Fabricated Using Amorphous SiInZnO

  • Lee, Sang Yeol
    • Transactions on Electrical and Electronic Materials
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    • v.18 no.5
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    • pp.250-252
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    • 2017
  • High-performance full swing logic inverters were fabricated using amorphous 1 wt% Si doped indium-zinc-oxide (a-SIZO) thin films with different channel layer thicknesses. In the inverter configuration, the threshold voltage was adjusted by varying the thickness of the channel layer. The depletion mode (D-mode) device used a TFT with a channel layer thickness of 60 nm as it exhibited the most negative threshold voltage (-1.67 V). Inverters using enhancement mode (E-mode) devices were fabricated using TFTs with channel layer thicknesses of 20 or 40 nm with excellent subthreshold slope (S.S). Both the inverters exhibited high voltage gain values of 30.74 and 28.56, respectively at $V_{DD}=15V$. It was confirmed that the voltage gain can be improved by increasing the S.S value.

Two Modified Z-Source Inverter Topologies - Solutions to Start-Up Dc-Link Voltage Overshoot and Source Current Ripple

  • Bharatkumar, Dave Heema;Singh, Dheerendra;Bansal, Hari Om
    • Journal of Power Electronics
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    • v.19 no.6
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    • pp.1351-1365
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    • 2019
  • This paper proposes two modified Z-source inverter topologies, namely an embedded L-Z-source inverter (EL-ZSI) and a coupled inductor L-Z source inverter (CL-ZSI). The proposed topologies offer a high voltage gain with a reduced passive component count and reduction in source current ripple when compared to conventional ZSI topologies. Additionally, they prevent overshoot in the dc-link voltage by suppressing heavy inrush currents. This feature reduces the transition time to reach the peak value of the dc-link voltage, and reduces the risk of component failure and overrating due to the inrush current. EL-ZSI and CL-ZSI possess all of the inherent advantages of the conventional L-ZSI topology while eliminating its drawbacks. To verify the effectiveness of the proposed topologies, MATLAB/Simulink models and scaled down laboratory prototypes were constructed. Experiments were performed at a low shoot through duty ratio of 0.1 and a modulation index as high as 0.9 to obtain a peak dc-link voltage of 53 V. This paper demonstrates the superiority of the proposed topologies over conventional ZSI topologies through a detailed comparative analysis. Moreover, experimental results verify that the proposed topologies would be advantageous for renewable energy source applications since they provide voltage gain enhancement, inrush current, dc-link voltage overshoot suppression and a reduction of the peak to peak source current ripple.

High Gain Soft switching Bi-directional Converter for Eco-friendly Vehicle HDC (친환경 자동차 HDC를 위한 고승압 소프트스위칭 양방향 컨버터)

  • Oh, Se-Cheol;Park, Jun-Sung;Kwon, Min-Ho;Choi, Se-Wan
    • The Transactions of the Korean Institute of Power Electronics
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    • v.17 no.4
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    • pp.322-329
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    • 2012
  • This paper proposes a non-isolated bidirectional soft-switching converter with high voltage for high step-up/down and high power applications. Compared to the conventional boost converter the proposed converter can achieve approximately doubled voltage gain using the same duty cycle. The voltage ratings of the switch and diode are reduced to half, which result in the use of devices with lower $R_{DS(ON)}$ and on drop leading to reduced conduction losses. Also, voltage ratings of the passive components are reduced, and therefore the total energy volume is reduced to half. Further, the switch is turned on with ZVS in the CCM operation which results in negligible surge caused leading to reduced switching losses. The validity of the proposed converter is proved through a 10kW prototype.

An Efficient and High-gain Inverter Based on The 3S Inverter Employs Model Predictive Control for PV Applications

  • Abdel-Rahim, Omar;Funato, Hirohito;Junnosuke, Haruna
    • Journal of Electrical Engineering and Technology
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    • v.12 no.4
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    • pp.1484-1494
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    • 2017
  • We present a two-stage inverter with high step-up conversion ratio engaging modified finite-set Model Predictive Control (MPC) for utility-integrated photovoltaic (PV) applications. The anticipated arrangement is fit for low power PV uses, the calculated efficiency at 150 W input power and 19 times boosting ratio was around 94%. The suggested high-gain dc-dc converter based on Cockcroft-Walton multiplier constitutes the first-stage of the offered structure, due to its high step-up ability. It can boost the input voltage up to 20 times. The 3S current-source inverter constitutes the second-stage. The 3S current-source inverter hires three semiconductor switches, in which one is functioning at high-frequency and the others are operating at fundamental-frequency. The high-switching pulses are varied in the procedure of unidirectional sine-wave to engender a current coordinated with the utility-voltage. The unidirectional current is shaped into alternating current by the synchronized push-pull configuration. The MPC process are intended to control the scheme and achieve the subsequent tasks, take out the Maximum Power (MP) from the PV, step-up the PV voltage, and introduces low current with low Total Harmonic Distortion (THD) and with unity power factor with the grid voltage.

Dual-Coupled Inductor High Gain DC/DC Converter with Ripple Absorption Circuit

  • Yang, Jie;Yu, Dongsheng;Alkahtani, Mohammed;Yuan, Ligen;Zhou, Zhi;Zhu, Hong;Chiemeka, Maxwell
    • Journal of Power Electronics
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    • v.19 no.6
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    • pp.1366-1379
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    • 2019
  • High-gain DC/DC converters have become one of the key technologies for the grid-connected operation of new energy power generation, and its research provides a significant impetus for the rapid development of new energy power generation. Inspired by the transformer effect and the ripple-suppressed ability of a coupled inductor, a double-coupled inductor high gain DC/DC converter with a ripple absorption circuit is proposed in this paper. By integrating the diode-capacitor voltage multiplying unit into the quadratic Boost converter and assembling the independent inductor into the magnetic core of structure coupled inductors, the adjustable range of the voltage gain can be effectively extended and the limit on duty ratio can be avoided. In addition, the volume of the magnetic element can be reduced. Very small ripples of input current can be obtained by the ripple absorption circuit, which is composed of an auxiliary inductor and a capacitor. The leakage inductance loss can be recovered to the load in a switching period, and the switching-off voltage spikes caused by leakage inductance can be suppressed by absorption in the diode-capacitor voltage multiplying unit. On the basis of the theoretical analysis, the feasibility of the proposed converter is verified by test results obtained by simulations and an experimental prototype.