• Journal of the Korea Safety Management & Science
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• v.26 no.2
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• pp.55-64
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• 2024

As the distribution of vehicles and logistics increases due to the development of human civilization and the increase in population, various roads play an important role in domestic traffic and transportation. However, the recent emergence of large cities and new cities is causing traffic problems, and the increase in roads is inevitable for the smooth distribution of vehicles and logistics. In Korea, mountainous regions occupy 70% of the country, so tunnels are used to open roads. Without this, it is difficult to open the road. Currently, there are 3,720tunnels (as of December 31, 2023) installed on high-speed national highways, general national highways, and local roads nationwide, with a length of 2.499 and increasing every year. Accordingly, fire accidents in tunnels will also increase, and due to the nature of tunnel fire accidents, there is a high probability that they will escalate into large-scale disasters, resulting in casualties and property damage, as well as significant social losses due to the disruption of logistics transportation, etc. As the possibility of potential hazards is increasing, the purpose of this study is to build a safe and efficient tunnel system by optimizing maintenance and management for fire and disaster accidents in tunnels.

• Multiscale and Multiphysics Mechanics
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• v.1 no.3
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• pp.261-270
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• 2016

The longitudinal velocity (forward speed) having significant importance in proper running of railway wheelset on track, depends greatly upon the adhesion ratio and creep analysis by implementation of suitable dynamic system on contamination. The wet track condition causes slip and slide of vehicle on railway tracking, whereas high speed may also increase slip and skidding to severe wear and deterioration of mechanical parts. The basic aim of this research is to design appropriate model aimed estimator that can be used to control railway vehicle forward velocity to avoid slip. For the filtration of disturbance procured during running of vehicle, the kalman filter is applied to estimate the actual signal on preferered samples of creep co-efficient for observing the applied attitude of noise. Thus error level is detected on higher and lower co-efficient of creep to analyze adhesion to avoid slip and sliding. The skidding is usually occurred due to higher forward speed owing to procured disturbance. This paper guides to minimize the noise and error based upon creep coefficient.

• JSTS:Journal of Semiconductor Technology and Science
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• v.12 no.3
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• pp.341-352
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• 2012

This paper presents a Processing Engine (PE) which is used in Low Density Parity Codec (LDPC) application with a novel charge-recovery logic called pseudo-NMOS boost logic (pNBL), to achieve high-speed and low power dissipation. pNBL is a high-overdriven and low area consuming charge recovery logic, which belongs to boost logic family. Proposed Processing Engine is used in LDPC circuit to reduce operating power dissipation and increase the processing speed. To demonstrate the performance of proposed PE, a test chip is designed and fabricated with 0.18 2m CMOS technology. Simulation results indicate that proposed PE with pNBL dissipates only 1 pJ/cycle when working at the frequency of 403 MHz, which is only 36% of PE with the conventional static CMOS gates. The measurement results show that the test chip can work as high as 609 MHz with the energy dissipation of 2.1 pJ/cycle.

• JSTS:Journal of Semiconductor Technology and Science
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• v.10 no.3
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• pp.193-202
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• 2010

This paper presents a high-speed low-complexity pipelined Reed-Solomon (RS) (255,239) decoder using pipelined reformulated inversionless Berlekamp-Massey (pRiBM) algorithm and its folded version (PF-RiBM). Also, this paper offers efficient pipelining and folding technique of the RS decoders. This architecture uses pipelined Galois-Field (GF) multipliers in the syndrome computation block, key equation solver (KES) block, Forney block, Chien search block and error correction block to enhance the clock frequency. A high-speed pipelined RS decoder based on the pRiBM algorithm and its folded version have been designed and implemented with 90-nm CMOS technology in a supply voltage of 1.1 V. The proposed RS(255,239) decoder operates at a clock frequency of 700 MHz using the pRiBM architecture and also operates at a clock frequency of 750 MHz using the PF-RiBM, respectively. The proposed architectures feature high clock frequency and low-complexity.

• IEIE Transactions on Smart Processing and Computing
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• v.6 no.2
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• pp.133-139
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• 2017

Vehicles have increasingly evolved and become intelligent with convergence of information and communications technologies (ICT). Vehicle communications (VC) has become one of the major necessities for intelligent vehicles. However, VC suffers from serious security problems that hinder its commercialization. Hence, the IEEE 1609 Wireless Access Vehicular Environment (WAVE) protocol defines a security service for VC. This service includes Advanced Encryption Standard-Counter with CBC-MAC (AES-CCM) for data encryption in VC. A high-speed AES-CCM crypto module is necessary, because VC requires a fast communication rate between vehicles. In this study, we propose and implement an efficient AES-CCM hardware architecture for high-speed VC. First, we propose a 32-bit substitution table (S_Box) to reduce the AES module latency. Second, we employ key box register files to save key expansion results. Third, we save the input and processed data to internal register files for secure encryption and to secure data from external attacks. Finally, we design a parallel architecture for both cipher block chaining message authentication code (CBC-MAC) and the counter module in AES-CCM to improve performance. For implementation of the field programmable gate array (FPGA) hardware, we use a Xilinx Virtex-5 FPGA chip. The entire operation of the AES-CCM module is validated by timing simulations in Xilinx ISE at a speed of 166.2 MHz.

• Journal of KIISE:Computer Systems and Theory
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• v.29 no.8
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• pp.463-471
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• 2002

In order to implement virtual endoscopy, high-speed rendering algorithm that generates accurate perspective projection images and efficient collision detection method are essential. In this paper we propose an efficient virtual endoscopy system based on volume rendering technique. It is possible to skip over empty (transparent) space using the distance value produced in preprocessing time, and it does not deteriorate image quality since it is an extension of ray-casting. It also accelerates rendering speed with minimal loss of image quality by adjusting sampling interval along a ray according to direction of the ray. Using the distance information, we can simplify the collision detection of volumetric objects.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.41 no.7
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• pp.63-73
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• 2004

This paper proposes an efficient centralized sin91e buffer management algorithm to arbitrate access contention mon processors on the multi-processor system for high-speed Packet filtering and proves that the algorithm provides reasonable performance by implementing it and applying it to a real multi-processor system. The multi-processor system for parallel packet filtering is modeled based on a network processor to distribute the packet filtering rules throughout the processors to speed up the filtering. In this paper we changed the number of processors and the processing time of the filtering rules as variables and measured the packet transfer rates to investigate the performance of the proposed algorithm.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.14 no.12
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• pp.1248-1255
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• 2003

High-speed QPSK demodulator has been one important design objective of any wireless communication systems, especially those offering broadband multimedia service. This paper describes Zero-Crossing IF-level(ZCIF) QPSK demodulator for high-speed wireless communications, and its hardware structures are discussed. ZCIF QPSK demodulator is mainly composed of symbol time circuit and carrier recovery circuit to estimate timing and phase-offsets. There are various schemes. Among them, we use Gardner algorithm and Decision-Directed carrier recovery algorithm which is most efficient scheme to warrant the fast acquisition and tracking to fabricate FPGA chip. The testing results of the implemented onto CPLD-FLEX10K chip show demodulation speed is reached up to 2.6［Mbps］. Actually in case of designing by ASIC, its speed may be faster than CPLD by 5 times. Therefore, it is possible to fabricate the ZCIF QPSK demodulator with speed of 10 Mbps.

• IEIE Transactions on Smart Processing and Computing
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• v.3 no.5
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• pp.267-270
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• 2014

This paper presents the comparative performance of an adaptive FIR filter for a Delayed LMS algorithm. The delayed error signal was used to obtain a Delayed LMS algorithm to allow efficient pipelining for achieving a small critical path and area efficient implementation. This paper presents hardware efficient results (device utilization parameters) and power consumed. The FPGA families (Artix-7, Virtex-7, and Kintex-7) for a low voltage perspective are shown. The synthesis results showed that the artix-7 CMOS family achieves the lowest power consumption of 1.118 mW with 83.18 % device utilization. Different Precision strategies, such as the speed optimization and power optimization, were imposed to achieve these results. The algorithm was implemented using MATLAB (2013b) and synthesized on the Leonardo spectrum.

• Journal of Korean Tunnelling and Underground Space Association
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• v.15 no.6
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• pp.559-570
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• 2013

High speed railway can transport large quantity of people and commodities in a short time and has become one of the most desirable and environmentally friendly transportation. However, it is hard to have a complicated route for high speed railways, construction of tunnels is essential to pass through a mountain area. When a high speed train enters a tunnel, pressure wave is created in a tunnel and the wave causes micro pressure wave and discomfort to passengers. In order to alleviate pressure wave in a tunnel, constructing a vertical shaft is one of the most efficient ways. This study represents a numerical analysis module, which takes into account the effect of a vertical shaft in a tunnel. The module can be used in a numerical program (TTMA) specialized for aerodynamics in a tunnel, and it was validated by comparing numerical results with various measurements in Emmequerung tunnel and results from numerical analysis using Fluent.