• 제목/요약/키워드: HBT

검색결과 233건 처리시간 0.024초

A 32 nm NPN SOI HBT with Programmable Power Gain and 839 GHzV ftBVCEO Product

  • Misra, Prasanna Kumar;Qureshi, S.
    • JSTS:Journal of Semiconductor Technology and Science
    • /
    • 제14권6호
    • /
    • pp.712-717
    • /
    • 2014
  • The performance of npn SiGe HBT on thin film SOI is investigated at 32 nm technology node by applying body bias. An n-well is created underneath thin BOX to isolate the body biased SOI HBT from SOI CMOS. The results show that the HBT voltage gain and power gain can be programmed by applying body bias to the n-well. This HBT can be used in variable gain amplifiers that are widely used in the receiver chain of RF systems. The HBT is compatible with 32 nm FDSOI technology having 10 nm film thickness and 30 nm BOX thickness. As the breakdown voltage increases by applying the body bias, the SOI HBT with 3 V $V_{CE}$ has very high $f_tBV_{CEO}$ product (839 GHzV). The self heating performance of the proposed SOI HBT is studied. The high voltage gain and power gain (60 dB) of this HBT will be useful in designing analog/RF systems which cannot be achieved using 32 nm SOI CMOS (usually voltage gain is in the range of 10-20 dB).

ALGaAs/GaAs HBT CML 논리 회로 설계 (Design of ALGaAs/GaAs HBT CML Logic Circuit)

  • 최병하;김학선;김은로;이형재
    • 한국통신학회논문지
    • /
    • 제17권5호
    • /
    • pp.509-520
    • /
    • 1992
  • AIGaAs/GaAs HBT를 이용한 고속 디지틀 시스템에 사용 될 CML OR/NOR 논리게이트를 설계하였다. HBT모델링은 직접 추출법, Gummel-poon모델을 혼합한 형태로 등가회로를 얻었으며 PSPICE를 이용한 시뮬레이션 결과, 전달지연시간이 25ps로써 차단 토글주파수가200Hz에 이르는 초고속 특성을 가지고 기 보고된 HBT의 ECL이나 ME.IFET SCFL에 비하여 noise margin이 커서 입력변동에 비한 잡음에 강하며 fan-out특성이 우수함을 확인하였다.

  • PDF

마우스 모델에서 항백탕 투여에 의한 종양 증식의 억제 및 Apoptosis의 유도 (Proapoptotic and antitumor effect of Hangbaek-Tang(HBT) in a tumor transplanted mouse model)

  • 윤용갑;김준희;송은정;황진기;남상윤
    • 대한한의학방제학회지
    • /
    • 제17권2호
    • /
    • pp.73-83
    • /
    • 2009
  • Objective : In vitro proapoptotic effect of Hangbaek-Tang (HBT) has been documented by one of us. In the present study, we aimed to demonstrate in vivo effect of HBT on tumor growth. Methods : In vitro selective cytotoxicity of HBT was examined by enumeration of viable cell numbers using BC3A mouse leukemic cells and normal spleen cells. In vivo effect of HBT (25 and 50 mg/mouse) on tumor growth was assayed using BC3A cells innoculated subcutaneously in the flank. Annexin-V apoptosis assay and PI staining was performed to determine the effective serum factor in HBT-treated mice. Leukocyte recruitment into peritoneum were analyzed by microscopy with a stained cytosmear of peritoneal lavage fluid. Results : HBT exhibited in vitro selective cytotoxicity to leukemic cells and did not show any toxicity on immune organs. In vivo i.p. administration of HBT induced significant reduction in tumor growth but not complete regression. Sera obtained from HBT-treated mice strongly inhibited BC3A cell growth in vitro and were revealed to markedly enhance apoptosis and accompanying cell death, when compared to those from PBS-treated mice. Abundant extravasation of leukocytes, especially neutrophils, into peritoneum was observed in HBT-treated mice. Conclusions : HBT causes leukemic, BC3A cell death in vivo via apoptosis as well as in vitro, for which functional involvement of leukocytes is suggested.

  • PDF

Epilayer Optimization of NPN SiGe HBT with n+ Buried Layer Compatible With Fully Depleted SOI CMOS Technology

  • Misra, Prasanna Kumar;Qureshi, S.
    • JSTS:Journal of Semiconductor Technology and Science
    • /
    • 제14권3호
    • /
    • pp.274-283
    • /
    • 2014
  • In this paper, the epi layer of npn SOI HBT with n+ buried layer has been studied through Sentaurus process and device simulator. The doping value of the deposited epi layer has been varied for the npn HBT to achieve improved $f_tBV_{CEO}$ product (397 GHzV). As the $BV_{CEO}$ value is higher for low value of epi layer doping, higher supply voltage can be used to increase the $f_t$ value of the HBT. At 1.8 V $V_{CE}$, the $f_tBV_{CEO}$ product of HBT is 465.5 GHzV. Further, the film thickness of the epi layer of the SOI HBT has been scaled for better performance (426.8 GHzV $f_tBV_{CEO}$ product at 1.2 V $V_{CE}$). The addition of this HBT module to fully depleted SOI CMOS technology would provide better solution for realizing wireless circuits and systems for 60 GHz short range communication and 77 GHz automotive radar applications. This SOI HBT together with SOI CMOS has potential for future high performance SOI BiCMOS technology.

IMT-2000 단말기용 InGaP/GaAs HBT MMIC 전력증폭기 설계 및 제작 (Design & Fabrication of an InGaP/GaAs HBT MMIC Power Amplifier for IMT-2000 Handsets)

  • 채규성;김성일;이경호;김창우
    • 한국통신학회논문지
    • /
    • 제28권11A호
    • /
    • pp.902-911
    • /
    • 2003
  • 에미터 면적이 2.0${\times}$20 $\mu\textrm{m}$$^2$인 단위 InGaP/GaAs HBT power cell을 이용하여 IMT-2000 단말기용 MMIC 2단 전력 증폭기를 설계 및 제작하였다. 온도 변화에 따른 전력증폭기의 RF 특성 변화를 보상시킬 수 있으며, 외부 조절 전압으로 대기전류를 줄일 수 있는 능동 바이어스 회로를 채택하였다. HBT의 실측정 S 파라미터와의 fitting을 통하여 비선형 등가 회로 파라미터를 추출하였고, load-pull 시뮬레이션으로 최대 출력 정합 임피던스를 결정하였다. 제작 및 측정 결과, MMIC 2단 전력증폭기는 on-wafer 측정에서 23 ㏈의 전력 이득과 28.4 ㏈m의 출력 전력( $P_{1-}$㏈/) 및 31%의 전력 부가 효율을 얻었으며, FR-4 기판상에 off-chip 출력정합회로를 구현한 COB 측정에서 22.3 ㏈의 전력이득과 26 ㏈m의 출력전력 및 28%의 전력부가효율을 얻었으며, -40 ㏈c의 ACPR 특성을 얻었다..

InGaP/GaAs HBT를 이용한 5.4㎓ 대역의 고성능 초고주파 집적회로 저잡음 증폭기 설계 (Design of High Performance LNA Based on InGaP/GaAs HBT for 5.4㎓ WLAN Band Applications)

  • 명성식;전상훈;육종관
    • 한국전자파학회논문지
    • /
    • 제15권7호
    • /
    • pp.713-721
    • /
    • 2004
  • 본 논문은 InGaP/GaAs HBT를 사용하여 5.4㎓ 대역의 고성능 저잡음 증폭기를 제안하였다. 기존에 InGaP/GaAs HBT는 고전력 증폭기 설계에 주로 사용되어 왔으나, 최근 RF 단일칩화를 위한 소자로 인식되고 있다. 이에 InCaP/GaAs HBT 소자를 이용한 저잡음 증폭기 설계에 대한 연구가 선행되어야 하며, 본 논문에서는 InGaP/GaAs HBT의 우수한 선형성 특성과 잡음 특성을 이용하여 뛰어난 성능의 저잡음 증폭기를 설계 및 제작하였다. 제안된 저잡음 증폭기는 높은 Q의 나선형 인덕터와 MIM 형태의 캐패시터 등의 수동 소자와 능동 소자가 모두 한 칩에 집적화 되어 입출력 패드와 함께 0.9${\times}$0.9$\textrm{mm}^2$의 면적에 집적화 되었다. 제안된 저잡음 증폭기는 최적의 동작점을 선택해 이득과 잡음 지수를 최적화하였으며, 더불어 우수한 선형성을 얻을 수 있었다. 측정결과 제작된 저잡음 증폭기는 13㏈의 이득과 2.1㏈의 우수한 잡음 지수를 보였으며, IIP3 5.5㏈m의 우수한 선형성이 측정되었다.

Fabrication and Characteristics of an InP Single HBT and Waveguide PD on Double Stacked Layers for an OEMMIC

  • Kim, Hong-Seung;Kim, Hye-Jin;Hong, Sun-Eui;Jung, Dong-Yun;Nam, Eun-Soo
    • ETRI Journal
    • /
    • 제26권1호
    • /
    • pp.61-64
    • /
    • 2004
  • We have explored the fabrication of an InP/InGaAs single heterojunction bipolar transistor (HBT) and a wave guide p-i-n photodiode (PD) on two kinds of double stacked layers for the implementation of an optoelectronic millimeter-wave monolithic integrated circuit (OEMMIC). We applied a photosensitive polyimide for passivation and integration to overcome the large difference between the HBT and PD layers of around $3{\mu}m$. Our experiment showed that the RF characteristics of the HBT were dependent on the location of the PD layer, while the dc performances of the HBTs and PDs were independent of the type of stacked layer used. The $F_t$ and $F_{max}$ of the HBTs on the HBT/PD stacked layer were 10% lower than those of the HBTs on the PD/HBT stacked layer.

  • PDF

1.9 GHz대 AlGaAs/GaAs HBT MMIC 전력증폭기 설계 (Design of a 1.9-GHz Band AlGaAs/GaAs HBT MMIC Power Amplifier)

  • 채규성;김성일;민병규;박성호;이경호
    • 한국전자파학회:학술대회논문집
    • /
    • 한국전자파학회 2000년도 종합학술발표회 논문집 Vol.10 No.1
    • /
    • pp.220-224
    • /
    • 2000
  • AlGaAs/GaAs HBT를 이용하여 1.9 GHz 대역 2단 MMIC 전력증폭기를 설계하였다. HBT의 실측 S 파라미터를 이용하여 정합회로를 설계하였으며, 목적에 따라 적절한 형태의 출력 정합 회로를 하이브리드 형태로 칩 외부에 부가할 수 있도록 설계하였다. HBT의 실측정 S 파라미터의 fitting을 통하여 비선형 등가모델을 추출하였고, load-pull 시뮬레이션으로 최대 출력 정합 임피던스를 결정하였다. 시뮬레이션 결과, 29 dBm의 출력 전력, 40 %의 전력 부가 효율, 그리고 16 dB의 전력 이득을 얻었다.

  • PDF

InAlGaAs/InGaAs HBT의 Monte carlo 해석 (Monte carlo analysis of InAlGaAs/InGaAs HBT)

  • 황성범;김용규;송정근
    • 대한전자공학회:학술대회논문집
    • /
    • 대한전자공학회 1998년도 하계종합학술대회논문집
    • /
    • pp.405-408
    • /
    • 1998
  • Due to the large conduction band discontinuity between emitter base, OmGaAs HBT has an advantge to enable the hot electrons to inject into the base. In this paper, InAlGaAs/InGaAs HBT with the various emitter junction gradings and the modified collectors are simulated and analyzed by HMC(hybrid monte carlo) simulator in order to find a optimal structure for the shortest transit time. A minium base transit time (.tau.$_{b}$ ) of 0.21 ps was obtained for HBT with the grading layer, which is parabolically graded from x=1.0 to x=0.5. The minimum collector transit time (.tau.$_{c}$ ) of 0.31ps was found when the collector was modified by inserting p$^{[-10]}$ and p$^{+}$ layers. Thus HBT in combination with the emitter grading and the modified collector layer showed the cut-off frequency (f$_{T}$) of 183GHz.z.z.

  • PDF

광통신용 HBT LD 구동 회로의 대역폭 개선을 위한 버퍼 구조에 관한 연구 (A Study on Buffer Structures to Improve the Bandwidth of HBT LD Driver for Optical Communication)

  • Hyeon Cheol Ki
    • 전자공학회논문지B
    • /
    • 제32B권5호
    • /
    • pp.710-719
    • /
    • 1995
  • In LD driver with HBT's. the speed characteristics of HBT's are deteriorated very much mainly due to the source resistance(Rs) of the signal applied to the LD driving HBT. We improved the bandwidth of LD driver by 2-5GHz with modifications of EF buffer. Because the modified buffers are composed of EF structure, their bandwidths are decreased rapidly as Rs is increased. When Rs is large these buffers decrease the bandwidth of the LD driver rather than increase it. To solve this problem, we propose a new buffer structure which contaings new charging and discharging path for the parasitic collector capacitance of the HBT. For Rs>100${\Omega}$, it shows superior characteristics of improving bandwidth to the EF buffers. It also shows good gain characteristics.

  • PDF