• Title/Summary/Keyword: Gate oxide

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Characteristics of the Reoxidized Oxynitride Gate Dielectric for Charge Trap Type NVSM (전하 트랩 형 비휘발성 기억소자를 위한 재산화 산화질화막 게이트 유전악의 특성에 관한 연구)

  • 이상은;박승진;김병철;서광열
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1999.11a
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    • pp.37-40
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    • 1999
  • For the first time, charge trapping nonvolatile semiconductor memories with the deoxidized oxynitride gate dielectric is proposed and demonstrated. Gate dielectric wit thickness of less than 1 nm have been grown by postnitridation of pregrown thermal silicon oxides in NO ambient and then reoxidation. The nitrogen distribution and chemical state due to NO anneal/reoxidation were investigated by M-SIMS, TOF-SIMS, AES depth profiles. When the NO anneal oxynitride film was reoxidized on the nitride film, the nitrogen at initial oxide interface not only moved toward initial oxide interface, but also diffused through the newly formed tunnel oxide by exchange for oxygen. The results of reoxidized oxynitride(ONO) film analysis exhibits that it is made up of SiO$_2$(blocking oxide)/N-rich SiON interface/Si-rich SiON(nitrogen diffused tunnel oxide)/Si substrate. In addition, the SiON and the S1$_2$NO Phase is distributed mainly near the tunnel oxide, and SiN phase is distributed mainly at tunnel oxide/Si substrate interface.

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A Study on Switching Characteristics of 1,200V Trench Gate Field stop IGBT Process Variables (1,200V 급 Trench Gate Field stop IGBT 공정변수에 따른 스위칭 특성 연구)

  • Jo, Chang Hyeon;Kim, Dea Hee;Ahn, Byoung Sup;Kang, Ey Goo
    • Journal of IKEEE
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    • v.25 no.2
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    • pp.350-355
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    • 2021
  • IGBT is a power semiconductor device that contains both MOSFET and BJT structures, and it has fast switching speed of MOSFET, high breakdown voltage and high current of BJT characteristics. IGBT is a device that targets the requirements of an ideal power semiconductor device with high breakdown voltage, low VCE-SAT, fast switching speed and high reliability. In this paper, we analyzed Gate oxide thickness, Trench Gate Width, and P+Emitter width, which are the top process parameters of 1,200V Trench Gate Field Stop IGBT, and suggested the optimized top process parameters. Using the Synopsys T-CAD Simulator, we designed IGBT devices with electrical characteristics that has breakdown voltage of 1,470 V, VCE-SAT 2.17 V, Eon 0.361 mJ and Eoff 1.152 mJ.

Effect of Channel and Gate Structures on Electrical Characteristics of Oxide Thin-Film Transistors (Channel과 gate 구조에 따른 산화물 박막트랜지스터의 전기적 특성 연구)

  • Kong, Heesung;Cho, Kyoungah;Kim, Jaybum;Lim, Junhyung;Kim, Sangsig
    • Journal of IKEEE
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    • v.26 no.3
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    • pp.500-505
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    • 2022
  • In this study, we designed oxide thin-film transistors (TFTs) with dual gate and tri layered split channels, and investigated the structural effect of the TFTs on the electrical characteristics. The dual gates played a key role in increasing the driving current, and the channel structure of tri layers and split form contributed to the increase in the carrier mobility. The tri layered channels consisting of the a-ITGZO and two ITO layers inserted between the gate dielectric and a-ITGZO led to the increase in the on-current by using ITO layers with high conductivity, and the split channels lowered series resistance of the channels. Compared with the mobility (15 cm2/V·s) of the single gate a-ITGZO TFT, the mobility (134 cm2/V·s) of the dual gate tri-layer split channel TFT was remarkably enhanced by the structural effect.

Fabrication and Properties of Under Gate Field Emitter Array for Back Light Unit in LCD

  • Jung, Yong-Jun;Park, Jae-Hong;Jeong, Jin-Soo;Nam, Joong-Woo;Berdinsky, Alexander S.;Yoo, Ji-Beom;Park, Chong-Yun
    • 한국정보디스플레이학회:학술대회논문집
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    • 2005.07b
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    • pp.1530-1533
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    • 2005
  • We investigated under-gate type carbon nanotube field emitter arrays (FEAs) for back light unit (BLU) in liquid crystal display (LCD). Gate oxide was formed by wet etching of ITO coated glass substrate instead of depositing $SiO_2$ on the glass substrate. Wet etching is easer and simpler than depositing and etching of thick gate oxide to isolate the gate metal from cathode electrode in triode. Field emission characteristic s of triode structure were measured. The maximum current density of 92.5 ${\mu}A/cm^2$ was when the gate and anode voltage was 95 and 2500 V, respectively at the anode-cathode spacing of 1500 ${\mu}m$.

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Rds(on) Properties of Power MOSFET of Trench Gate in Etch Process (Trench Gate 구조를 가진 Power MOSFET의 Etch 공정 온 저항 특성)

  • Kim, Gwon-Je;Yang, Chang-Heon;Kwon, Young-Soo;Shin, Hoon-Kyu
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2010.06a
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    • pp.389-389
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    • 2010
  • In this paper, an investigation of the benefits of gate oxide for 8" the manufacturing of Trench MOSFETs and its impact on device performance is presented. Layout dimensions of trench power MOSFETs have been continuously reduced in order to decrease the specific on-resistance, maintaining equal vertical dimensions. We discuss experimental results for devices with a pitch size down fabricated with an unconventional gate trench topology and a simplified manufacturing scheme. The fabricated Trench MOSFETs are observed the trench gate oxidation by SEM.

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MOSFET Characteristics and Hot-Carrier Reliability with Sidewall Spacer and Post Gate Oxidation (Sidewall Spacer와 Post Gate Oxidation에 따른 MOSFET 특성 및 Hot Carrier 신뢰성 연구)

  • 이상희;장성근;이선길;김선순;최준기;김용해;한대희;김형덕
    • Proceedings of the IEEK Conference
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    • 1999.06a
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    • pp.243-246
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    • 1999
  • We studied the MOSFET characteristics and the hot-carrier reliability with the sidewall spacer composition and the post gate oxidation thickness in 0.20${\mu}{\textrm}{m}$ gate length transistor. The MOSFET with NO(Nitride+Oxide) sidewall spacer exhibits the large degradation of hot-carrier lifetime because there is no buffering oxide against nitride stress. When the post gate oxidation is skipped, the hot-carrier lifetime is improved, but GIDL (Gate Induced Drain Leakage) current is also increased.

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The Characteristics of MOSFET with Reoxidized Nitrided Oxide Gate Dielectrics (재산화된 질화 산화막을 게이트 절연막으로 사용한 MOSFET의 특성)

  • 양광선;박훈수;김봉렬
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.28A no.9
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    • pp.736-742
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    • 1991
  • N$^{+}$poly gate NMOSFETs and p$^{+}$ poly gate (surface type) PMOSFETs with three different gate oxides(SiO2, NO, and ONO) were fabricated. The rapid thermal nitridation and reoxidation techniques have been applied to gate oxide formation. The current drivability of the ONO NMOSFET shows larger values than that of the SiO2 NMOSFET. The snap-back occurs at a lower drain voltage for SiO$_2$ cases for ONO NMOSFET. Under the maximum substrate current bias conditions, hot-carrier effects inducting threshold voltage shift and transconductance degradation were investigated. The results indicate that ONO films exhibit less degradation in terms of threshold voltage shift. It was confirmed that the ONO samples achieve good improvement of hot-carrier immunity. In a SiO$_2$ SC-PMOSFET, with significant boron penetration, it becomes a depletion type (normally-on). But ONO films show excellent impurity barrier properties to boron penetration from the gate.

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A Study on the Structure of Polycrystalline Silicon Thin Film Transistor for Reducing Off-Current (OFF 전류의 감소를 위한 다결정 실리콘 박막 트랜지스터의 구조 연구)

  • Oh, Jeong-Min;Min, Byung-Hyuk;Han, Min-Koo
    • Proceedings of the KIEE Conference
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    • 1993.07b
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    • pp.1292-1294
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    • 1993
  • This paper proposes a new structure of polycrystalline silicon(poly-Si) thin film transistor(TFT) having a thick gate-oxide below the gate edge. The new structure is fabricated by the gate re-oxidation in wet ambient. It is shown that the thick gate-oxide below the gate edge is effective in reducing the leakage current and the gate-drain overlap capacitance. We have simulated this device by using the SSUPREM4 process simulator and the SPISCES-2B device simulator. As a simulation result it is found that the new structure provides a low tentage current less than 0.2 pA and achieves a on/off ratio as high as $5{\times}10^7$.

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A Methodology of Dual Gate MOSFET Dosimeter with Compensated Temperature Sensitivity

  • Lho, Young-Hwan
    • Journal of IKEEE
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    • v.15 no.2
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    • pp.143-148
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    • 2011
  • MOS (Metal-Oxide Semconductor) devices among the most sensistive of all semiconductors to radiation, in particular ionizing radiation, showing much change even after a relatively low dose. The necessity of a radiation dosimeter robust enough for the working environment has increased in the fields of aerospace, radio-therapy, atomic power plant facilities, and other places where radiation exists. The power MOSFET (Metal-Oxide Semiconductor Field-Effect Transistor) has been tested for use as a gamma radiation dosimeter by measuring the variation of threshold voltage based on the quantity of dose, and a maximum total dose of 30 krad exposed to a $^{60}Co$ ${\gamma}$-radiation source, which is sensitive to environment parameters such as temperature. The gate oxide structures give the main influence on the changes in the electrical characteristics affected by irradiation. The variation of threshold voltage on the operating temperature has caused errors, and needs calibration. These effects can be overcome by adjusting gate oxide thickness and implanting impurity at the surface of well region in MOSFET.

Effects of Various Deposition Rates of Al2O3 Gate Insulator on the Properties of Organic Thin Film Transistor (알루미늄 옥사이드 절연층의 증착율이 유기박막 트랜지스터의 특성에 미치는 영향)

  • Choi, Kyung-Min;Hyung, Gun-Woo;Kim, Young-Kwan;Choi, Eou-Sik;Kwon, Sang-Jik
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.22 no.12
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    • pp.1063-1066
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    • 2009
  • In this study, we fabricated pentacene organic thin film trasistors(OTFTs) which used aluminum oxide as the gate insulator. Aluminum oxide for OTFTs was deposited on glass substrate with a different deposition rate by E-beam evaporation. In case of the deposition rate of $0.1\;{\AA}$, the fabricated aluminum oxide gate insulating OTFT showed a threshold voltage of -1.36 V, an on/off current ratio of $1.9{\times}10^3$ and field effect mobility $0.023\;cm^2/V_s$.