• 한국진공학회:학술대회논문집
• /
• 한국진공학회 1998년도 제14회 학술발표회 논문개요집
• /
• pp.71-72
• /
• 1998

반도체 집적 공정의 발달로 차세대 소자용으로 30 A 이하의 극 박막 Si02 절연막이 요구되고 있으며, 현재 제품으로 50-70 A 두께의 절연막을 사용한 것이 발표되고 있다. 절연막의 두께가 앓아질수록 많은 문제가 발생할 수 있는데 그 예로 절연막의 breakdo때둥에 의한 신뢰성 특성의 악화, 절연막올 통한 direct tunneling leakage current, boron풍의 dopant 침투로 인한 소자 특성 ( (Threshold Voltage)의 불안, 전기적 stress하에서의 leakage current증가와 c charge-trap 및 피terface s쩌.te의 생성으로 인한 소자 특성의 변화 둥으로 요약 된다. 절연막의 특성올 개선하기 위해 여러 가지 새로운 공정들이 제안되었다. 그 예로, Nitrogen올 Si/Si02 계면에 doping하여 절연막의 특성을 개선하는 방법 으로 고온 열처 리 를 NH3, N20, NO 분위 기 에서 실시 하거 나, polysilicon 또는 s silicon 기판에 nitrogen올 이온 주입하여 열처리 하는 방법, 그리고 Plasma분 위기에서 Nitrogen 함유 Gas를 이용하여 nitrogen을 doping시키는 방법 둥이 연구되고 있다. 또한 Oxide cleaning 후 상온에서 성장되는 oxide를 최소화 하여 절연막의 특성올 개선하기 위하여 LOAD-LOCK을 이용하는 방법, C뼈피ng 공정의 개선올 통한 contamination 감소와 silicon surface roughness 감소 로 oxide 신뢰성올 개선하는 방법 둥이 있다. 구조적 인 측면 에 서 는 Polysilicon 의 g없n size 를 최 적 화하여 OxideIPolysilicon 의 계면 특성올 개선하는 연구와 Isolation및 Gate ETCH공정이 절연막의 특성에 미 치 는 영 향도 많이 연구되 고 있다 .. Plasma damage 가 Oxide 에 미 치 는 효과 를 제어하는 방법과 Deuterium열처리 퉁올 이용하여 Hot electron Stress하에서 의 MOS 소자의 Si/Si02 계면의 신뢰성을 개선하고 있다. 또한 극 박막 전연막의 신뢰성 특성올 통계적 분석올 통하여 사용 가능한 수명 올 예 측 하는 방법 과 Direct Tunneling Leakage current 를 고려 한 허 용 가농 한 동작 전 압 예측 및 Stress Induced Leakage Current 둥에 관해서 도 최 근 활발 한 연구가 진행되고 있다.

• JSTS:Journal of Semiconductor Technology and Science
• /
• 제4권2호
• /
• pp.94-99
• /
• 2004

silicided 50-nm-gate-length n-type Schottky barrier metal-oxide-semiconductor field-effect-transistors (SB-MOSFETs) with 5 nm gate oxide thickness are manufactured. The saturation current is $120{\mu}A/{\mu}m$ and on/off-current ratio is higher than $10^5$ with low leakage current less than $10{\mu}A/{\mu}m$. Novel phenomena of this device are discussed. The increase of tunneling current with the increase of drain voltage is explained using drain induced Schottky barrier thickness thinning effect. The abnormal increase of drain current with the decrease of gate voltage is explained by hole carrier injection from drain into channel. The mechanism of threshold voltage increase in SB-MOSFETs is discussed. Based on the extracted model parameters, the performance of 10-nm-gate-length SB-MOSFETs is predicted. The results show that the subthreshold swing value can be lower than 60 mV/decade.

• JSTS:Journal of Semiconductor Technology and Science
• /
• 제10권4호
• /
• pp.309-315
• /
• 2010

A fully-differential low-voltage low-power electrocardiogram (ECG) amplifier by using the nonfeedback PMOS pseudo-resistors is proposed. It consists of two operational-transconductance amplifiers (OTA) in series (a preamplifier and a variable-gain amplifier). To make it insensitive to the gate leakage current of the OTA input transistor, the feedback pseudo-resistor of the conventional ECG amplifier is moved to input branch between the OP amp summing node and the DC reference voltage. Also, an OTA circuit with a Gm boosting block without reducing the output resistance (Ro) is proposed to maximize the OTA DC gain. The measurements shows the frequency bandwidth from 7 Hz to 480 Hz, the midband gain programmable from 48.7 dB to 59.5 dB, the total harmonic distortion (THD) less than 1.21% with a full voltage swing, and the power consumption of 233 nW in a 0.13 ${\mu}m$ CMOS process at the supply voltage of 0.7 V.

• 한국전기전자재료학회:학술대회논문집
• /
• 한국전기전자재료학회 2007년도 추계학술대회 논문집
• /
• pp.96-96
• /
• 2007

Low voltage organic TFTs (OTFTs) and ZnO based TFTs (<5V), utilizing room temperature deposited $Bi_{1.5}Zn_{1.0}Nb_{1.5}O_7$ (BZN) thin films were recently reported, pointing to high-k gate insulators as a promising route for realizing low voltage operating flexible electronics. $Bi_{1.5}Zn_{1.0}Nb_{1.5}O_7$ (BZN) thin film is one of the most promising materials for gate insulator because of its large dielectric constant (~60) at room temperature. However their tendency to suffer from relatively high leakage current at low electric field (>0.3MV/cm) hinder the application of BZN thin films for gate insulator. In order to improve leakage current characteristics of BZN thin film, we mixed 30mol% MgO with 70mol% BZN and their dielectric and electric properties were characterized. We fabricated field-effect transistors with transparent oxide semiconductor ZnO serving as the electron channel and high-k $(Bi_{1.5}Zn_{1.0}Nb_{1.5}O_7)_{0.7}(MgO)_{0.3}$ as the gate insulator. The devices exhibited low operation voltages (<4V) due to high capacitance of the $(Bi_{1.5}Zn_{1.0}Nb_{1.5}O_7)_{0.7}(MgO)_{0.3}$ dielectric.

• ETRI Journal
• /
• 제38권2호
• /
• pp.244-251
• /
• 2016

In this paper, we investigate the electrical characteristics of two trench-gate-type super-barrier rectifiers (TSBRs) under different p-body implantation conditions (low and high). Also, design considerations for the TSBRs are discussed in this paper. The TSBRs' electrical properties depend strongly on their respective p-body implantation conditions. In the case of the TSBR with a low p-body implantation condition, it exhibits MOSFET-like properties, such as a low forward voltage ($V_F$) drop, high reverse leakage current, and a low peak reverse recovery current owing to a majority carrier operation. However, in the case of the TSBR with a high p-body implantation condition, it exhibits pn junction diode.like properties, such as a high $V_F$, low reverse leakage current, and high peak reverse recovery current owing to a minority carrier operation. As a result, the TSBR with a low p-body implantation condition is capable of operating as a MOSFET, and the TSBR with a high p-body implantation condition is capable of operating as either a pn junction diode or a MOSFET, but not both at the same time.

• 한국정보디스플레이학회:학술대회논문집
• /
• 한국정보디스플레이학회 2003년도 International Meeting on Information Display
• /
• pp.622-625
• /
• 2003

The dependence of stress-induced leakage current on LTPS TFTs was characterized in this study. The impacts of poly-Si crystallization, gate insulator, impurity activation, hydrogenation process and electrostatic discharge damage were investigated. It was observed more TFTs instable characteristic under those process-assisted processes. According to the LTPS roadmap, smaller geometric and low temperature process were the future trend and the stress-induced leakage current should be worthy of remark.

• 산업기술연구
• /
• 제19권
• /
• pp.101-105
• /
• 1999

Ultra thin $Ta_2O_5$ gate dielectrics were prepared by RTMOCVD (rapid thermal metal organic chemical vapor deposition) using Ta source $TaC_{12}H_{30}O_5N$ and $O_2$ gaseous mixtures. As a result, $Ta_2O_5$ thin films showed significantly low leakage current compared to $SiO_2$ of identical thickness, which was due to the stabilization of the interfacial layer by NO ($SiO_xN_y$) passivation layer. The conduction of leakage current in $Ta_2O_5$ thin films was described by the hopping mechanism of Poole-Frenkel (PF) type.

• 대한전자공학회:학술대회논문집
• /
• 대한전자공학회 2003년도 하계종합학술대회 논문집 II
• /
• pp.687-690
• /
• 2003

Experimental results are presented for gate oxide degradation and its effect on device parameters under negative and positive bias stress conditions using NMOSFET's with 3 nm gate oxide. The degradation mechanisms are highly dependent on stress conditions. For negative gate voltage, both hole- and electron-trapping are found to dominate the reliability of gate oxide. However, with changing gate voltage polarity, the degradation becomes dominated by electron trapping. Statistical parameter variations as well as the "OFF" leakage current depend on those charge trapping. Our results therefore show that Si or O bond breakage by electron can be another origin of the investigated gate oxide degradation.gradation.

• 대한전자공학회논문지SD
• /
• 제47권7호
• /
• pp.1-7
• /
• 2010

Fin 폭이 다른 accumulation-mode Pi-gate p-채널 MOSFET의 고온특성을 측정 분석하였다. 사용된 소자는 Fin 높이는 10nm 이며 폭은 30nm, 40nm, 50nm 의 3종류이다. 온도에 따라서 드레인 전류, 문턱전압, subthreshold swing, 유효이동도 및 누설 전류 특성을 측정하였다. 온도가 증가할수록 드레인 전류는 상온에서 보다 약간 증가하는 현상이 나타났다. 온도에 따른 문턱전압의 변화는 inversion-mode 소자 보다 작은 것으로 측정되었다. 유효이동도는 온도가 증가할수록 감소하였으나 Fin 폭이 감소할수록 이동도는 큰 것을 알 수 있었다.

• 한국전기전자재료학회:학술대회논문집
• /
• 한국전기전자재료학회 2010년도 하계학술대회 논문집
• /
• pp.371-371
• /
• 2010

In this paper, the stress induced leakage currents of thin silicon oxides is investigated in the MEMS implementation with nano structure. The stress and transient currents associated with the on and off time of applied voltage were used to measure the distribution of high voltage stress induced traps in thin silicon oxide films. The oxide current for the thickness dependence of stress current, transient current, and stress induced leakage currents has been measured in oxides with thicknesses between $41{\AA}$, which have the gate area $10^{-3}cm^2$. The stress current, transient current is used to estimate to fundamental limitations on oxide thicknesses.