• Title/Summary/Keyword: Gate Design

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Design of Optical Receiver Using Independent-Gate-Mode Double-Gate MOSFETs (Independent-Gate-Mode Double-Gate MOSFET을 이용한 Optical Receiver 설계)

  • Kim, Yu-Jin;Jeong, Na-Rae;Park, Sung-Min;Shin, Hyung-Soon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.47 no.8
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    • pp.13-22
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    • 2010
  • Independent-Gate-Mode Double-Gate(IGM-DG) MOSFET overcomes the limitation of bulk-MOSFET's channel controllability and enables to control the front and back-gate voltages independently. Therefore, circuit designs utilizing the IGM-DG MOSFETs provide the advantage of setting 4-terminal freely, hence achieving not only the performance improvement but also the larger scale integration. This paper presents a 15Gb/s optical receiver with a 1.0V power supply voltage, which consists of a transimpedance amplifier (TIA), a feedforward limiting amplifier (LA), and an output buffer. HSPICE simulations were conducted to confirm the circuit performance, and also to verify the circuit stability issues which may occur from the variations of process and supply voltage.

Metal Insulator Gate Geometric HEMT: Novel Attributes and Design Consideration for High Speed Analog Applications

  • Gupta, Ritesh;Kaur, Ravneet;Aggarwal, Sandeep Kr;Gupta, Mridula;Gupta, R.S.
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.10 no.1
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    • pp.66-77
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    • 2010
  • Improvement in breakdown voltage ($BV_{ds}$) and speed of the device are the key issues among the researchers for enhancing the performance of HEMT. Increased speed of the device aspires for shortened gate length ($L_g$), but due to lithographic limitation, shortening $L_g$ below sub-micrometer requires the inclusion of various metal-insulator geometries like T-gate onto the conventional architecture. It has been observed that the speed of the device can be enhanced by minimizing the effect of upper gate electrode on device characteristics, whereas increase in the $BV_{ds}$ of the device can be achieved by considering the finite effect of the upper gate electrode. Further, improvement in $BV_{ds}$ can be obtained by applying field plates, especially at the drain side. The important parameters affecting $BV_{ds}$ and cut-off frequency ($f_T$) of the device are the length, thickness, position and shape of metal-insulator geometry. In this context, intensive simulation work with analytical analysis has been carried out to study the effect of variation in length, thickness and position of the insulator under the gate for various metal-insulator gate geometries like T-gate, $\Gamma$-gate, Step-gate etc., to anticipate superior device performance in conventional HEMT structure.

Analysis of Electrical Characteristics of Dual Gate IGBT for Electrical Vehicle (전기자동차용 이중 게이트 구조를 갖는 전력 IGBT소자의 전기적인 특성 분석)

  • Kang, Ey Goo
    • Journal of IKEEE
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    • v.21 no.1
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    • pp.1-6
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    • 2017
  • IGBT (Insulated Gate Bipolar Transistor) device is a device with excellent current conducting capability, it is widely used as a switching device power supplies, converters, solar inverter, household appliances or the like, designed to handle the large power. This research was proposed 1200 class dual gate IGBT for electrical vehicle. To compare the electrical characteristics, The planar gate IGBT and trench gate IGBT was designd with same design and process parameters. And we carried to compare electrical characteristics about three devices. As a result of analyzing electrical characteristics, The on state voltage drop charateristics of dual gate IGBT was superior to those of planar IGBT and trench IGBT. Therefore, Aspect to Energy Loss, dual gate IGBT was efficiency. The breakdown volgate and threshold voltage of planar, trench and dual gate IGBT were 1460V and 4V.

Optimization of Design Variable for Injection Molding Using a Modified Golden Section Search Method (수정된 황금분할 탐색법을 이용한 사출성형 설계인자의 최적화)

  • Park, Jong-Cheon;Kim, Kyung-Mo
    • Journal of the Korean Society of Manufacturing Process Engineers
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    • v.16 no.1
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    • pp.63-69
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    • 2017
  • The golden section search method is widely used to optimize a single design variable in many fields due to its superior advantages of search. In this paper, a new direct search method is proposed by modifying the search structure of the golden section search method; thus, it can be adapted in the optimization of a single design variable for the injection molding process. This proposed method is applied to determine an optimal gate position for the injection molding of a bezel of an automated teller machine for minimizing the injection pressure. Thus, an optimal gate position where the injection pressure is decreased by 4.5 MPa to that of the initial position was obtained with a small number of simulations. It is anticipated that the current proposed search method can be utilized as a practical tool for optimizing single variables for injection molding design.

Delay Insensitive Asynchronous Circuit Design Based on New High-Speed NCL Cells (새로운 고속의 NCL 셀 기반의 지연무관 비동기 회로 설계)

  • Kim, Kyung Ki
    • Journal of Korea Society of Industrial Information Systems
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    • v.19 no.6
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    • pp.1-6
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    • 2014
  • The delay-insensitive Null Convention Logic (NCL) asynchronous design as one of innovative asynchronous logic design methodologies has many advantages of inherent robustness, power consumption, and easy design reuses. However, transistor-level structures of conventional NCL gate cells have weakness of low speed, high area overhead or high wire complexity. Therefore, this paper proposes a new high-speed NCL gate cells designed at transistor level for high-speed, low area overhead, and low wire complexity. The proposed NCL gate cells have been compared to the conventional NCL gates in terms of circuit delay, area and power consumption.

Design of Broad Band RF Components for Partial Discharge Monitoring System (부분방전 모니터링 시스템을 위한 광대역 RF 소자설계 연구)

  • Lee, Je-Kwang;Ko, Jae-Hyeong;Kim, Koon-Tae;Kim, Hyeong-Seok
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.60 no.12
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    • pp.2286-2292
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    • 2011
  • In this paper we present the design of Low Noise Amplifier(LNA), mixer and filter for RF front-end part of partial discharge monitoring system. The monitoring system of partial discharge in high voltage power machinery is used to prevent many kinds of industrial accidents, and is usually composed of three parts - sensor, RF front-end and digital microcontroller unit. In our study, LNA, mixer and filter are key components of the RF front-end. The LNA consists of common gate and common source-cascaded structure and uses the resistive feedback for broad band matching. A coupled line structure is utilized to implement the filter, of which size is reduced by the meander structure. The mixer is designed using dual gate structure for high isolation between RF and local oscillator signal.

Study on Thermal Characteristics of IGBT (IGBT의 열 특성에 관한 연구)

  • Kang, Ey-Goo;Ahn, Byoung-Sub;Nam, Tae-Jin
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2009.11a
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    • pp.70-70
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    • 2009
  • In this paper, we proposed 2500V Non punch-through(NPT) Insulated gate bipolar transistor(IGBT) for high voltage industry application. we carried out optimal simulation for high efficiency of 2500V NPT IGBT according to size of device. In results, we obtaind design parameter with 375um n-drift thickness, 15um gate length, and 8um emitter windows. After we simulate with optimal parameter, we obtained 2840V breakdown voltage and 3.4V Vce,sat. These design and process parameter will be used designing of more 2000V NPT IGBT devices.

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Design of Broadband Hybrid Mixer using Dual-Gate FET (이중게이트 FET 를 이용한 광대역 하이브리드 믹서 설계)

  • Jin, Zhe-Jun;Lee, Kang-Ho;Koo, Kyung-Heon
    • Proceedings of the IEEK Conference
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    • 2005.11a
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    • pp.197-200
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    • 2005
  • This paper presents the design of a broadband hybrid mixer using dual-gate FET topology with a low-pass filter which improves return loss of output to isolate RF and LO signal. The low-pass filter shows the isolation whose RF and LO signal is better than 40 dBc at 2 GHz and 5 GHz band. The dual-gate mixer which has been designed by using cascade topology operates when the lower FET is biased in linear region and the upper FET is in saturation. The input matching circuit has been designed to have conversion gain from 2 GHz to 6 GHz. The designed mixer with low-pass filter shows the conversion gain of better than 7 dB from 2 GHz to 6 GHz at a low LO power level of 0 dBm with the fixed IF frequency of 21.4 MHz.

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