• 대한조선학회논문집
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• 제28권2호
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• pp.104-117
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• 1991

자유표면을 가지는 유체에서 물체가 운동을 하게되면 물체와 자유표면의 교차점 주위에서 유제유동이 매우 급격해진다. 이 유동현상은 부유체의 운동에 따르는 유체유동, 탱크내에서의 슬로싱, 조파기 문제, 물체의 입수등 여러문제에서 발생된다. 이 유동은 교차점 주위에서 특이성을 가진다고 알려져 있었으나 Roberts(1987)는 물체의 운동이 충격운동이 아닐 경우에는 특이성이 존재하지 않는다는 것을 밝혔다. 본 논문에서는 표면장력을 고려하여 물체의 운동이 충격운동인 경우에도 특이성을 가지지 않는 해석해를 구하였고, 해의 특성을 조사하여 진동현상에 대한 임계치를 구하여 교차점에서 떨어진 거리가 이 임계치보다 작은 곳에서는 진동현상이 존재하지 않는다는 것을 밝혔다.

• 한국가시화정보학회지
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• 제12권1호
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• pp.30-34
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• 2014

Bluff bodies under the external periodic force vibrate at their own natural or forced frequency. Rectangular bodies or similar structures such as high-rise towers and apartments, and recently a well-cited application - offshore floating bodies, usually needs to reduce these vibrations for stability and the mode control. Therefore, this study is aiming to reduce or control the vibration of a structure by a passive control method, i.e., TLCD (Tuned Liquid Column Damper). Controlling a moving body with a TLCD based on a variety of the orifice shape has been preliminary studied. In order to get a proper control, an optimized study is made on the design of the orifice shape, which has internal plates with the holes. The results show the force acting on the body due to the periodic movement highly depends on the number of holes on the plate and the height of the water level. Therefore, the optimum shape of the orifice and the height of the water level should be confirmed by a series of experiments.

• 센서학회지
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• 제30권2호
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• pp.82-87
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• 2021

In this paper, we propose a high-speed, low-power complementary metal-oxide semiconductor (CMOS) binary image sensor featuring a gate/body-tied (GBT) p-channel metal-oxide-semiconductor field-effect transistor (PMOSFET)-type photodetector based on a double-tail comparator. The GBT photodetector forms a structure in which the floating gate (n+ polysilicon) and body of the PMOSFET are tied, and amplifies the photocurrent generated by incident light. The double-tail comparator compares the output signal of a pixel against a reference voltage and returns a binary signal, and it exhibits improved power consumption and processing speed compared with those of a conventional two-stage comparator. The proposed sensor has the advantages of a high signal processing speed and low power consumption. The proposed CMOS binary image sensor was designed and fabricated using a standard 0.18 ㎛ CMOS process.

• 한국철도학회:학술대회논문집
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• 한국철도학회 2011년도 춘계학술대회 논문집
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• pp.78-81
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• 2011

Generally, vehicle is insulated from the earth by rubber tire which is intrinsically the insulation material. The electrical ground of vehicle was floated in the sense of electric potential over the electric power sources. First of all, the floated electrical ground of vehicle should be equipotentially connected with the (-) line of electrical equipment. Bimodal tram has the different kinds of electric system. They must be kept insulated to each other electrically. When there is some unbalanced event or connection between them, it will invoke some errors or breakdown to electrical devices including sensors and actuators. This paper has investigated the floating ground effect of bimodal tram built with composite body and shown the effect according to the unbalanced ground of vehicle and the connection between different electric systems.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1998년도 추계종합학술대회 논문집
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• pp.545-548
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• 1998

Thin film SOI(Silicon-On-Insulator) devices exhibit floating body effect. In this paper, SOI NMOSFET is proposed to solve this problem. Some part of gate oxide was considered to be 30nm~80nm thicker than the other normal gate oxide and simulated with TSUPREM-4. The I-V characteristics were simulated with 2D MEDICI mesh. Since part of gate oxide has different oxide thickness in proposed device, the gate electric field strength is not the same throught the gate and consequently the reduction of current kink effect is occurred.

• 한국해안해양공학회지
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• 제3권2호
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• pp.92-99
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• 1991

해상에 계류된 부유체는 입사하는 파도에 의해 선형항인 파랑하중과 함께 2차항인 표류력을 받는다. 2차항의 표류력은 자유표면조건의 비선형성에 의해 서로 유사한 주파수를 갖는 2개의 선형 성분파간의 상호작용으로 발생하는 장주기 성분을 포함하고 있다. 대개의 계류계의 수평 인장력은 관성력항에 비해 아주 작은 양이고, 따라서 계류계의 설치로 나타나는 부유체의 수평운동 고유주기는 장주기이므로 때로는 공진이 일어나게 된다. 이렇게 야기된 대진폭운동은 작업조건을 악화시키는 것은 물론 계류계에 심각한 손상을 줄 수 있다. 부유체의 계류계로 최근 관심을 모으고 있는 Turret 계류계의 설계에도 이러한 장주기 표류력에 대한 고려와 함께 풍향성이 있는(weathervaning) 천이운동시 Roller Bearing에 걸리는 수평하중에 대한 해석이 필수적이다. 본 논문에서는 불규칙파중에 계류된 부유체에 작용하는 장주기 표류력을 2차 전달함수를 사용하여 계산한 뒤 장주기 표류력에 의한 전후동요를 시간기억 효과를 고려하여 시뮬레이션하였다. 계류계로는 분산된(spread) Turret형 계류계를 대상으로 하였으며 계류계의 수평인장계수를 매시간 단계마다 계산하는 방법으로 비선형성을 고려하였다.

• 센서학회지
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• 제30권2호
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• pp.114-118
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• 2021

In this study, the sensitivity of an active pixel sensor (APS) was adjusted by employing a gate/body-tied (GBT) p-channel metal-oxide semiconductor field-effect transistor (PMOSFET)-type photodetector with a transfer gate. A GBT PMOSFET-type photodetector can amplify the photocurrent generated by light. Consequently, APSs that incorporate GBT PMOSFET-type photodetectors are more sensitive than those APSs that are based on p-n junctions. In this study, a transfer gate was added to the conventional GBT PMOSFET-type photodetector. Such a photodetector can adjust the sensitivity of the APS by controlling the amount of charge transmitted from the drain to the floating diffusion node according to the voltage of the transfer gate. The results obtained from conducted simulations and measurements corroborate that, the sensitivity of an APS, which incorporates a GBT PMOSFET-type photodetector with a built-in transfer gate, can be adjusted according to the voltage of the transfer gate. Furthermore, the chip was fabricated by employing the standard 0.35 ㎛ complementary metal-oxide semiconductor (CMOS) technology, and the variable sensitivity of the APS was thereby experimentally verified.

• 한국전기전자재료학회논문지
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• 제25권2호
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• pp.96-99
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• 2012

We fabricated fully depleted (FD) SOI-based 1T-DRAM cells with planar channel or recessed channel and the electrical characteristics were investigated. In particular, the dependence of memory operating mode on the channel structure of 1T-DRAM cells was evaluated. As a result, the gate induced drain leakage current (GIDL) mode showed a better memory property for planar type 1T-DRAM. On the other hand, the impact ionization (II) mode is more effective for recessed type.

• 진공이야기
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• 제3권1호
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• pp.16-21
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• 2016

FinFETs are able to be scaled down to 22 nm and beyond while suppressing effectively short channel effect, and have superior performance compared to 2-dimensional (2-D) MOSFETs. Bulk FinFETs are built on bulk Si wafers which have less defect density and lower cost than SOI(Silicon-On-Insulator) wafers. In contrast to SOI FinFETs, bulk FinFETs have no floating body effect and better heat transfer rate to the substrate while keeping nearly the same scalability. The bulk FinFET has been developed at 14 nm technology node, and applied in mass production of AP and CPU since 2015. In the development of the bulk FinFETs at 10 nm and beyond, self-heating effects (SHE) is becoming important. Accurate control of device geometry and threshold voltage between devices is also important. The random telegraph noise (RTN) would be problematic in scaled FinFET which has narrow fin width and small fin height.

• JSTS:Journal of Semiconductor Technology and Science
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• 제14권2호
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• pp.169-174
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• 2014

As a versatile processing method for nanoscale memory integration, laser-induced epitaxial growth is proposed for the fabrication of vertical Si channel (VSC) transistor. The fabricated VSC transistor with 80 nm gate length and 130 nm pillar diameter exhibited field effect mobility of $300cm^2/Vs$, which guarantees "device quality". In addition, we have shown that this VSC transistor provides memory operations with a memory window of 700 mV, and moreover, the memory window further increases by employing charge trap dielectrics in our VSC transistor. Our proposed processing method and device structure would provide a promising route for the further scaling of state-of-the-art memory technology.