• Title/Summary/Keyword: Flip chip bonding

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Characterization of Fluxing and Hybrid Underfills with Micro-encapsulated Catalyst for Long Pot Life

  • Eom, Yong-Sung;Son, Ji-Hye;Jang, Keon-Soo;Lee, Hak-Sun;Bae, Hyun-Cheol;Choi, Kwang-Seong;Choi, Heung-Soap
    • ETRI Journal
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    • v.36 no.3
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    • pp.343-351
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    • 2014
  • For the fine-pitch application of flip-chip bonding with semiconductor packaging, fluxing and hybrid underfills were developed. A micro-encapsulated catalyst was adopted to control the chemical reaction at room and processing temperatures. From the experiments with a differential scanning calorimetry and viscometer, the chemical reaction and viscosity changes were quantitatively characterized, and the optimum type and amount of micro-encapsulated catalyst were determined to obtain the best pot life from a commercial viewpoint. It is expected that fluxing and hybrid underfills will be applied to fine-pitch flip-chip bonding processes and be highly reliable.

Flip-Chip Package of Silicon Pressure Sensor Using Lead-Free Solder (무연솔더를 이용한 실리콘 압력센서의 플립칩 패키지)

  • Cho, Chan-Seob
    • Journal of the Korean Society of Industry Convergence
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    • v.12 no.4
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    • pp.215-219
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    • 2009
  • A packaging technology based on flip-chip bonding and Pb-free solder for silicon pressure sensors on printed circuit board (PCB) is presented. First, the bump formation process was conducted by Pb-free solder. Ag-Sn-Cu solder and the pressed-screen printing method were used to fabricate solder bumps. The fabricated solder bumps had $189-223{\mu}m$ width, $120-160{\mu}m$ thickness, and 5.4-6.9 standard deviation. Also, shear tests was conducted to measure the bump shear strength by a Dage 2400 PC shear tester; the average shear strength was 74 g at 0.125 mm/s of test speed and $5{\mu}m$ shear height. Then, silicon pressure sensor packaging was implemented using the Pb-free solder and bump formation process. The characteristics of the pressure sensor were analogous to the results obtained when the pressure sensor dice are assembled and packaged using the standard wire-bonding technique.

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Thermo-ompression Process for High Power LEDs (High Power LED 열압착 공정 특성 연구)

  • Han, Jun-Mo;Seo, In-Jae;Ahn, Yoomin;Ko, Youn-Sung;Kim, Tae-Heon
    • Journal of the Korean Society of Manufacturing Technology Engineers
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    • v.23 no.4
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    • pp.355-360
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    • 2014
  • Recently, the use of LED is increasing. This paper presents the new package process of thermal compression bonding using metal layered LED chip for the high power LED device. Effective thermal dissipation, which is required in the high power LED device, is achieved by eutectic/flip chip bonding method using metal bond layer on a LED chip. In this study, the process condition for the LED eutectic die bonder system is proposed by using the analysis program, and some experimental results are compared with those obtained using a DST (Die Shear Tester) to illustrate the reliability of the proposed process condition. The cause of bonding failures in the proposed process is also investigated experimentally.

Warpage Characteristics Analysis for Top Packages of Thin Package-on-Packages with Progress of Their Process Steps (공정 단계에 따른 박형 Package-on-Package 상부 패키지의 Warpage 특성 분석)

  • Park, D.H.;Jung, D.M.;Oh, T.S.
    • Journal of the Microelectronics and Packaging Society
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    • v.21 no.2
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    • pp.65-70
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    • 2014
  • Warpage of top packages to form thin package-on-packages was measured with progress of their process steps such as PCB substrate itself, chip bonding, and epoxy molding. The $100{\mu}m$-thick PCB substrate exhibited a warpage of $136{\sim}214{\mu}m$. The specimen formed by mounting a $40{\mu}m$-thick Si chip to such a PCB using a die attach film exhibited the warpage of $89{\sim}194{\mu}m$, which was similar to that of the PCB itself. On the other hand, the specimen fabricated by flip chip bonding of a $40{\mu}m$-thick chip to such a PCB possessed the warpage of $-199{\sim}691{\mu}m$, which was significantly different from the warpage of the PCB. After epoxy molding, the specimens processed by die attach bonding and flip chip bonding exhibited warpages of $-79{\sim}202{\mu}m$ and $-117{\sim}159{\mu}m$, respectively.

2D and 3D Topology Optimization with Target Frequency and Modes of Ultrasonic Horn for Flip-chip Bonding (플립칩 접합용 초음파 혼의 목표 주파수와 모드를 고려한 2차원 및 3차원 위상최적화 설계)

  • Ha, Chang Yong;Lee, Soo Il
    • Transactions of the Korean Society for Noise and Vibration Engineering
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    • v.23 no.1
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    • pp.84-91
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    • 2013
  • Ultrasonic flip-chip bonding needs a precise bonding tool which delivers ultrasonic energy into chip bumps effectively to use the selected resonance mode and frequency of the horn structure. The bonding tool is excited at the resonance frequency and the input and output ports should locate at the anti-nodal points of the resonance mode. In this study, we propose new design method with topology optimization for ultrasonic bonding tools. The SIMP(solid isotropic material with penalization) method is used to formulate topology optimization and OC(optimal criteria) algorithm is adopted for the update scheme. MAC(modal assurance criterion) tracking is used for the target frequency and mode. We fabricate two prototypes of ultrasonic tools which are based on 3D optimization models after reviewing 2D and 3D topology optimization results. The prototypes are satisfied with the ultrasonic frequency and vibration amplitude as the ultrasonic bonding tools.

Study on Joint of Micro Solder Bump for Application of Flexible Electronics (플렉시블 전자기기 응용을 위한 미세 솔더 범프 접합부에 관한 연구)

  • Ko, Yong-Ho;Kim, Min-Su;Kim, Taek-Soo;Bang, Jung-Hwan;Lee, Chang-Woo
    • Journal of Welding and Joining
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    • v.31 no.3
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    • pp.4-10
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    • 2013
  • In electronic industry, the trend of future electronics will be flexible, bendable, wearable electronics. Until now, there is few study on bonding technology and reliability of bonding joint between chip with micro solder bump and flexible substrate. In this study, we investigated joint properties of Si chip with eutectic Sn-58Bi solder bump on Cu pillar bump bonded on flexible substrate finished with ENIG by flip chip process. After flip chip bonding, we observed microstructure of bump joint by SEM and then evaluated properties of bump joint by die shear test, thermal shock test, and bending test. After thermal shock test, we observed that crack initiated between $Cu_6Sn_5IMC$ and Sn-Bi solder and then propagated within Sn-Bi solder and/or interface between IMC and solder. On the other hands, We observed that fracture propated at interface between Ni3Sn4 IMC and solder and/or in solder matrix after bending test.

Properties of High Power Flip Chip LED Package with Bonding Materials (접합 소재에 따른 고출력 플립칩 LED 패키지 특성 연구)

  • Lee, Tae-Young;Kim, Mi-Song;Ko, Eun-Soo;Choi, Jong-Hyun;Jang, Myoung-Gi;Kim, Mok-Soon;Yoo, Sehoon
    • Journal of the Microelectronics and Packaging Society
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    • v.21 no.1
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    • pp.1-6
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    • 2014
  • Flip chip bonded LED packages possess lower thermal resistance than wire bonded LED packages because of short thermal path. In this study, thermal and bonding properties of flip chip bonded high brightness LED were evaluated for Au-Sn thermo-compression bonded LEDs and Sn-Ag-Cu reflow bonded LEDs. For the Au-Sn thermo-compression bonding, bonding pressure and bonding temperature were 50 N and 300oC, respectively. For the SAC solder reflow bonding, peak temperature was $255^{\circ}C$ for 30 sec. The shear strength of the Au-Sn thermo-compression joint was $3508.5gf/mm^2$ and that of the SAC reflow joint was 5798.5 gf/mm. After the shear test, the fracture occurred at the isolation layer in the LED chip for both Au-Sn and SAC joints. Thermal resistance of Au-Sn sample was lower than that of SAC bonded sample due to the void formation in the SAC solder.