• Journal of Electrical Engineering and Technology
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• v.10 no.3
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• pp.1138-1143
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• 2015

Effects of fabrication process variations on impedance of microelectrodes integrated on a neural probe were examined through equivalent circuit modeling and SPICE simulation. Process variation and the corresponding range were estimated based on experimental data. The modeling results illustrate that the process variation induced by metal etching process was the dominant factor in impedance variation. We also demonstrate that the effect of process variation is frequency dependent. Another process variation that was examined in this work was the thickness variation induced by deposition process. The modeling results indicate that the effect of thickness variation on impedance is negligible. This work provides a means to predict the variations in impedance values of microelectrodes on neural probe due to different process variations.

• IE interfaces
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• v.16 no.3
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• pp.344-351
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• 2003

Critical dimension is one of the most important characteristics of up-to-date integrated circuit devices. Hence, critical dimension control in a semiconductor wafer fabrication process is inevitable in order to achieve optimum device yield as well as electrically specified functions. Currently, in complex semiconductor wafer fabrication processes, statistical methodologies such as Shewhart-type control charts become crucial tools for practitioners. Meanwhile, given a critical dimension sampling plan, the analysis of variance technique can be more effective to investigating critical dimension variation, especially for on-chip and on-wafer variation. In this paper, relating to a typical sampling plan, linear statistical models are presented for the analysis of critical dimension variation. A case study is illustrated regarding a semiconductor wafer fabrication process.

• Journal of the Korean Institute of Telematics and Electronics
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• v.24 no.6
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• pp.992-997
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• 1987

This paper describes the design and fabrication of an integrated circuit that can separate the horizontal SYNC., vertical SYNC. and composite SYNC. signal included in a composite video signal. The circuit that is based on the comparator level samplign method can separate a stable SYNC. signal even from an external circuit with large variation. It has been fabrivated by the SST bipolar process. Its chip size is 1.5x1.5mm\ulcorner As a result, we succeeded in fabrication of IC which satisfied DC characteristics and SYNC. singal separator function.

• Transactions on Electrical and Electronic Materials
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• v.11 no.4
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• pp.190-193
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• 2010

This report covers an effective fabrication method of graphene nanoribbon for top-gated field effect transistors (FETs) utilizing electron beam lithography with a bi-layer resists (XR-1541/poly methtyl methacrylate) process. To improve the variation of the gating properties of FETs, the residues of an e beam resist on the graphene channel are successfully taken off through the combination of reactive ion etching and a lift-off process for the XR-1541 bi-layer. In order to identify the presence of graphene structures, atomic force microscopy measurement and Raman spectrum analysis are performed. We believe that the lift-off process with bi-layer resists could be a good solution to increase gate dielectric properties toward the high quality of graphene FETs.

• Journal of Institute of Control, Robotics and Systems
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• v.15 no.12
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• pp.1240-1245
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• 2009

The throughput characteristics of the cluster tool with dual blade robot are analyzed. Using equipment's cycle time chart of the equipment, simple analytic form of the throughput is derived. Then, several important throughput characteristics are analyzed by the throughput formula. First, utilization of the process chamber and the robot are maximized by assigning the equipment to the process whose processing time is near the critical process time. Second, rule for selecting optimal number of process chambers is suggested. It is desirable to select a single process chamber plus a single robot structure for relatively short time process and multi process chambers plus a single robot, namely cluster tool for relatively long time process. Third, throughput variation between equipments due to the wafer transfer time variation is analyzed, especially for the process whose processing time is less than critical process time. And the throughput and the wafer transfer time of the equipments in our fabrication line are measured and compared to the analysis.

• Journal of the Korean Society for Precision Engineering
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• v.21 no.4
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• pp.32-38
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• 2004

Laser-induced thermochemical wet etching of titanium in phosphoric acid has been investigated to examine the feasibility of this method fur fabrication of microstructures. Cutting, drilling, and milling of titanium foil were carried out while examining the influence of process parameters on etch width, etch depth, and edge straightness. Laser power, scanning speed of workpiece, and etchant concentration were chosen as major process parameters influencing on temperature distribution and reaction rate. Etch width increased almost linearly with laser power showing little dependence on scanning speed while etch depth showed wide variation with both laser power and scanning speed. A well-defined etch profile with good surface quality was obtained at high concentration condition. Fabrication of a hole, micro cantilever beam, and rectangular slot with dimension of tess than 100${\mu}{\textrm}{m}$ has been demonstrated.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2000.11a
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• pp.748-751
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• 2000

Microlens made by laser radiation method have advantages in the easiness of their fabrication. The process is based on the projection of a chromium-on-quartz reticle on to the Polymer using a pulsed 248nm KrF excimer laser. Fabrication process is a fluence-dependent rate and density. The lens shape is defined by a rotationally symmetric sluence distribution with smooth radial variation in the image plane of the reticle. A typical lens of 50㎛ diameter was fabricated by irradiating 2000 laser pulses within 40 seconds. The experimental results show microlens fabrication by UV laser is possible and well worth studying further.

• Journal of the Korean Institute of Telematics and Electronics
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• v.23 no.3
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• pp.384-388
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• 1986

This paper describes the design and fabrication of an integrated circuit that can detect the teletext signal included in a composite video signal. The circuit that is based on the comparatorlevel sampling method can detect a stable data signal even from an external circuit with large variation. It has been fabricated by the SST bipolar standard process. Its chip size is $2.5x3.78mm^2$.

• Journal of IKEEE
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• v.22 no.2
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• pp.420-426
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• 2018

In the near future, CNTFET(Carbon NanoTube Field Effect Transistor) is considered as one of the most promising candidate for the replacement of modern silicon-based transistors by utilizing the ballistic or near-ballistic transport capability of CNT(Carbon NanoTube). For the large-scale fabrication of high performance CNTFET, semiconducting CNTs have to be well-aligned with a fixed pitch and high densities in the each CNTFET. However, due to the immaturity of the CNTFET fabrication process, CNTs can be unevenly positioned in a CNTFET and existing HSPICE library file cannot support the circuit level evaluation of performance variation caused by the unevenly positioned CNTs. To evaluate the performance variation, linear programming methodology was suggested previously, but the errors can be made during the calculation of the current and the gate capacitance of a CNTFET. In this paper, the reasons causing errors will be discussed in detail and the new methodology to reduce the errors will be also suggested. Simulation results shows that the errors can be reduced from 7.096% to 3.15%.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2005.11a
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• pp.43-44
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• 2005

SU-8 is a epoxy based photoresist designed for MEMS applications, where a thick, chemically and thermally stable image is desired. But SU-8 has proven to be very sensitive to variation in processing variables and hence difficult to use in the fabrication of useful structures. In this paper, negative SU-8 photoresist processed has been characterized in terms of delamination. Based on a full factorial designed experiment. Employing the design of experiment (DOE), a process parameter is established, and analyzing of full factional design is generated to investigate degree of delamination associated with three process parameters: post exposure bake (PEB) temperature, PEB time, and exposure energy. These results identify acceptable ranges of the three process variables to avoid delamination of SU-8 film, which in turn might lead to potential defects in MEMS device fabrication.