• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.20 no.4
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• pp.357-365
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• 2009

A general analysis of a microstrip-to-vertically mounted slotline(VMS) coupler is presented with a view to developing an equivalent circuit, and the efficient evaluation of the related circuit element values. Based on this theory, the effects of frequency and structure parameters such as aperture length and VMS width on the characteristics of the coupler are studied. In order to check the validity of the proposed analysis and design theory, a C-band linearly tapered slot antenna fed by an aperture-coupled back-to-back microstripline-to- VMS coupling structure is optimally designed using a hybrid genetic algorithm. Moreover, the computed characteristics from the network analysis is compared to the measurement and simulation results. The obtained results fully validate the efficiency and accuracy of the proposed network model.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.37 no.1
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• pp.83-91
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• 2000

This paper presents a new technique to reduce a large interconnect circuit with tens of thousands of elements into the one that is small enough to be analyzed by circuit simulators such as SPICE. This technique takes a fundamentally different approach form the conventional methods based on the interconnect circuit structure analysis and several rules based on the Elmore time constant. The time moments are computed form the circuit consisting of the interconnect circuit and the CMOS gate driver model computed by the AWE technique. Then, the equivalent RC circuit is synthesized from those moments. The characteristics of the driving CMOS gate can be reflected with the high degree of accuracy and the size of the compressed circuit is determined by the number of output nodes regardless of the size of the original interconnect circuits. This technique has been implemented in C language, applied to several interconnect circuits driven by a 0.5${\mu}m$ CMOS gate and the equivalent RC circuits with more than 99% reduction ratio and accuracy with 1 ~ 10% error in therms of propagation delays were obtained.

• Journal of Electrochemical Science and Technology
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• v.11 no.1
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• pp.1-13
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• 2020

As research on secondary batteries becomes important, interest in analytical methods to examine the condition of secondary batteries is also increasing. Among these methods, the electrochemical impedance spectroscopy (EIS) method is one of the most attractive diagnostic techniques due to its convenience, quickness, accuracy, and low cost. However, since the obtained spectra are complicated signals representing several impedance elements, it is necessary to understand the whole electrochemical environment for a meaningful analysis. Based on the understanding of the whole system, the circuit elements constituting the cell can be obtained through construction of a physically sound circuit model. Therefore, this mini-review will explain how to construct a physically sound circuit model according to the characteristics of the battery cell system and then introduce the relationship between the obtained resistances of the bulk (R_b), charge transfer reaction (R_ct), interface layer (R_SEI), diffusion process (W) and battery characteristics, such as the state of charge (SOC), temperature, and state of health (SOH).

• Journal of Electrical Engineering and Technology
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• v.11 no.5
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• pp.1323-1331
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• 2016

• The Transactions of The Korean Institute of Electrical Engineers
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• v.56 no.9
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• pp.1626-1631
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• 2007

This paper presents a new modeling method using lamp output power and the modeling coefficients of the lamp. The proposed method utilizes the lamp modeling coefficients such as equivalent impedance Z(p), coupling coefficient of the transformer k(p), turns ratio of the transformer n(p), and plasma resistance Rp(p) as a function of lamp output power. The equivalent impedance Z(p) was developed from the equivalent resistance Req(p) and equivalent inductance Leq(p) of the lamp. Simulation and experimental results of the proposed model are presented in order to validate the proposed method. The modeling method can use to design an impedance matching circuit for a Class-D inverter.

• IEIE Transactions on Smart Processing and Computing
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• v.5 no.3
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• pp.207-214
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• 2016

Optical communication systems are rapidly spread following increases in data traffic. In this work, a 32-Gb/s inductorless output buffer circuit with adjustable pre-emphasis is proposed. The proposed circuit consists of an output buffer circuit and an emphasis circuit. The emphasis circuit emphasizes the high frequency components and adds the characteristics of the output buffer circuit. We proposed a design method using a small-signal equivalent-circuit model and designed the compensation characteristics with a 65-nm CMOS process in detail using HSPICE simulation. We also realized adjustable emphasis characteristics by controlling the voltage. To confirm the advantages of the proposed circuit and the design method, we fabricated an output buffer IC with adjustable pre-emphasis. We measured the jitter and eye height with a 32-Gb/s input using the IC. Measurement results of double-emphasis showed that the jitter was 14% lower, and the eye height was 59% larger than single-emphasis, indicating that our proposed configuration can be applied to the design of an output buffer circuit for higher operation speed.

• JSTS:Journal of Semiconductor Technology and Science
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• v.12 no.3
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• pp.320-330
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• 2012

In this paper, we investigate the power integrity of grid structures for power and ground distribution on printed circuit board (PCB). We propose the 2D transmission line method (TLM)-based model for efficient frequency-dependent impedance characterization and PCB-package-integrated circuit (IC) co-simulation. The model includes an equivalent circuit model of fringing capacitance and probing ports. The accuracy of the proposed grid model is verified with test structure measurements and 3D electromagnetic (EM) simulations. If the grid structures replace the plane structures in PCBs, they should provide effective shielding of the electromagnetic interference in mobile systems. An analytical model to predict the shielding effectiveness (SE) of the grid structures is proposed and verified with EM simulations.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.24 no.4
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• pp.436-447
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• 2013

In this paper, Integrated circuit(IC) electromagnetic(EM) conducted immunity measurement and simulation using bulk current injection(BCI) and direct power injection(DPI) methods were conducted for 1.8 V I/O buffers. Using the equivalent circuit models developed for IC electromagnetic conducted immunity tests, we investigated the reliability of the frequency region where IC electromagnetic conducted immunity test is performed. The insertion loss for the noise injection path obtained from the simulation indicates that using only one conducted immunity test method cannot provide reliable conducted immunity test for broadband noise. Based on the forward power results, we analyzed the actual amount of EM noise injected to IC. We propose a more reliable immunity test methods for broad band noise.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.29 no.9
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• pp.677-684
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• 2018

In this paper, we propose a method for high-frequency modeling of transformers using the S-parameter. The open and short circuits of the primary and secondary sides were configured, and the reflection coefficient in each circuit was measured using a vector network analyzer. The equivalent circuit elements were extracted from the measured results to model the high-frequency equivalent circuit, and the validity of the method was verified by comparing the measured S-parameters in a 2-port network with the simulation results.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.18 no.3
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• pp.120-127
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• 2004

With the proliferation of nonlinear loads such as switching mode power supplies, high neurtral harmonic currents in three-phase four-wire distribution system have been observed. It has been known that the grounded impedance has an effect on the neutral current of a system which operates with harmonics present since the neutral conductor is grounded. On-site measurements of harmonic currents and voltages were made and the corresponding equivalent circuit was developed. The circuit model under study was simulated numerically and graphically through the use of the software MATLAB. Simulation results verifying the relationship between the neutral harmonic current and ground impedance are presented.