• 한국정밀공학회지
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• 제13권1호
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• pp.53-61
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• 1996

A clear understanding of the surface formation mechanism due to cutting is very important to help produce a good quality surface. Much of the roughness along the length of a bar being cut in a lathe can be explained in terms of macroscopic tool shape and feed rate. However, the roughness along the direction of cutting requires a different explanation. The formation of surface roughness is a problem in flow and fracture of materials in the vicinity of the tool edge. On a microscopic scale the cutting edge is rounded because it is impossible to grind a perfectly sharp cutting edge. Even if a perfectly sharp cutting edge were obtained it would soon become dull as a result of rapid breakdown and wear of the cutting edge. A research project is proposed in which in the main object is to model the surface formation mechanism due to cutting. The tool was assumed to be dull, that is, its edge has a finite radius. In order to study the effect of the radius of cutting edge on the surface formation, tools having different cutting edges were used. For orthogonal cutting experiment, cast iron and glass were chosen as brittle materials. Plowing forces acting in the cutting edge were estimated and its effect on the surface roughness was studied by observing the machined surface using optical microscope.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2003년도 하계학술대회 논문집 Vol.4 No.1
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• pp.396-399
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• 2003

4H-SiC un diodes with field limiting rings(FLRs) were fabricated and characterized. The dependences of reverse breakdown voltage on the number of FLRs, the distance between p-base main junction and first FLR, and activation temperatures, were investigated. Al and B ions were implanted and activated at high temperature to form p-base region and p+ region in the n-epilayer. We have obtained up to 1782V of reverse breakdown voltage in the un diode with two FLRs on loom thick epilayer. The differential on-resistances of the fabricated diode are $5.3m{\Omega}cm^2$ at $100A/cm^2$ and $2.7m{\Omega}cm^2$ at $1kA/cm^2$, respectively. All pn diodes with FLRs have higher avalanche breakdown voltages than that of diode without an FLR. Regardless of the activation temperature, the un diode with a FLR located 5um apart from main junction has the highest mean breakdown voltage around 1600V among the diodes with one ring. On the other hand, the pn diode with two rings showed different behavior with activation temperature. It reveals that high voltage SiC pn diodes with low on-resistance can be fabricated by using the FLR edge termination.

• 조명전기설비학회논문지
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• 제15권5호
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• pp.28-33
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• 2001

본 논문에서는 금속성 파티클이 GIS 스페이서에 부착되었을 경우 파괴전압특성에 대한 립의 여러 조건에서의 효과를 분석하였다. 립-스페이서의 여러 위치에 금속성 파티클을 부착하고 립의 위치, 길이, 두께 등의 변화에 따른 파괴전압을 측정하여 기조에 제안된 립-스페이서보다 파괴전압을 더욱 향상시킬 수 있는 형상을 제시하고자 하였다. 그 결과 립이 없거나 립이 하나인 스페이서 보다 립이 두 개 있는 형태의 립-스페이서가 전반적으로 가장 양호한 파괴전압 특성을 가지고 있음을 알 수 있었으며, 립의 길이와 두께에 따라서도 파괴전압 특성이 달라짐을 알 수 있었다. 특히 립의 끝단을 라운드 처리함으로써 파괴전압 특성을 더욱 향상시킬 수 있음을 알 수 있었다.

• Journal of Mechanical Science and Technology
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• 제18권12호
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• pp.2273-2283
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• 2004

The vortical flows over sharp-edged delta wings with and without a leading edge extension have been investigated using a computational method. Three-dimensional compressible Reynolds-averaged Navier-Stokes equations are solved to provide an understanding of the effects of the angle of attack and the angle of yaw on the development and interaction of vortices and the aerodynamic characteristics of the delta wing at a freestream velocity of 20 m/s. The present computations provide qualitatively reasonable predictions of vortical flow characteristics, compared with past wind tunnel measurements. In the presence of a leading edge extension, a significant change in the suction pressure peak in the chordwise direction is much reduced at a given angle of attack. The leading edge extension can also stabilize the wing vortex on the windward side at angles of yaw, which dominates the vortical flows over yawed delta wings.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2001년도 하계학술대회 논문집 C
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• pp.1451-1453
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• 2001

An SOI(Silicon-On-Insulator) LD(Lateral Double-diffused)MOS with graded gate and recessed source is proposed. The proposed structure can increase the breakdown voltage by reducing the electric field crowding at the edge of gate. Simulation results by TSUPREM4 and MEDICI have shown that the breakdown voltage of proposed device was found to be 52 V while that of conventional device was 45 V. At the same breakdown voltage of 45 V, the on-resistance of the LDMOS with graded gate and recessed source was 14.4 % lower than that of conventional structure.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2010년도 춘계학술대회 논문집
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• pp.32-32
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• 2010

A epoxy/multilayered silicate nanocomposite was prepared by a new AC electric application method and micro silica particle was poured into the nanocomposite in order to prepare epoxy/micro-and-nano- mixed composites (EMNC). Electric insulation breakdown strength was measured in a sphere-sphere electrode system designed for the prevention of edge breakdown and the data were estimated by Weibull plot. As the exfoliated silicate nano-plates were homogeniously dispersed in the micro silica particles, the insulation property was higherd.

• 조명전기설비학회논문지
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• 제16권2호
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• pp.59-64
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• 2002

본 논문에서는 전계해석을 통하여 금속성 파티클이 GIS 스페이서의 여러 위치에 부차되었을 경우 립이 파괴전압특성에 미치는 영향을 분석하였다. 또한, 립-스페이서의 여러 위치에 금속성 파티클을 부착하고 립의 모양, 길이, 두께 등의 변화에 따라 얻은 파괴진압특성 실험결과를 전계해석의 결과와 비교·검토하였다. 전계해석의 결과 립의 연면에서의 전계집중이 다른 부분에 비하며 완화되어 절연파괴시 발생된 스트리머의 진전이 억제될 수 있다는 것을 알 수 있었으며, 실험을 통하여 파괴전압이 상승된다는 것을 확인할 수 있었다. 또한 립의 길이와 두께 등에 따라서도 파괴전압 특성이 달라짐을 알 수 있었다. 또한 립의 끝단을 라운드 처리함으로써 파괴전압 특성을 더욱 향상시킬 수 있음을 전계해석과 실험을 통하여 알 수 있었다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1988년도 추계학술대회 논문집 학회본부
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• pp.155-158
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• 1988

The fabrication of devices using plans technology could lend to n serious degradation in the breakdown voltage as a result of high electric field at the edges. An elegant approach to reducing the electric field at the edge is by using field limiting ring. The presence of surface charge has n strong influrence on the depletion layer spreading at the surface region because this charge complements the charge due to the ionized acceptors inside the depletion layer. Surface charge of either polarity can lower the breakdown voltage because it affects the distribution of electric field st the edges. In this paper we discuss the influrences of fixed oxide charge on the breakdown voltage of the p+/n junction with field limiting ring(or without field limiting ring).

• ETRI Journal
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• 제26권1호
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• pp.7-13
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• 2004

To improve the characteristics of breakdown voltage and specific on-resistance, we propose a new structure for a LDMOSFET for a PDP scan driver IC based on silicon-on-insulator with a trench under the gate in the drift region. The trench reduces the electric field at the silicon surface under the gate edge in the drift region when the concentration of the drift region is high, and thereby increases the breakdown voltage and reduces the specific on-resistance. The breakdown voltage and the specific on-resistance of the fabricated device is 352 V and $18.8 m{\Omega}{\cdot}cm^2$ with a threshold voltage of 1.0 V. The breakdown voltage of the device in the on-state is over 200 V and the saturation current at $V_{gs}=5V$ and $V_{ds}$=20V is 16 mA with a gate width of $150{\mu}m$.

• 대한전자공학회논문지SD
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• 제48권12호
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• pp.8-14
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• 2011

본 논문에서는 이차원 소자 시뮬레이션을 활용하여 주어진 게이트-드레인 간격에서 AlGaN/GaN-on-Si HEMT (high electron mobility transistor) 의 고항복전압 구현을 위한 게이트 전계판의 최적화 구조를 제안하였다. 게이트 전계판 구조를 도입하여 게이트 모서리의 전계를 감소시켜 항복전압을 크게 증가시킬 수 있음을 확인 하였으며, 이때 전계판의 길이와 절연막의 두께에 따라 게이트 모서리와 전계판 끝단에서 전계분포의 변화를 분석하였다. 최적화를 위하여 시뮬레이션을 수행한 결과, 1 ${\mu}m$ 정도의 짧은 게이트 전계판으로도 효과적으로 게이트 모서리의 전계를 감소시킬 수 있으며 전계판의 길이가 너무 길어지면 전계판과 드레인 사이의 남은 길이가 일정 수준 이하로 감소되어 오히려 항복전압이 급격하게 감소함을 보였다. 전 계판의 길이가 1 ${\mu}m$ 일 때 최대 항복전압을 얻었으며, 게이트 전계판의 길이를 1 ${\mu}m$로 고정하고 $SiN_x$ 박막의 두께를 변화시켜본 결과 게이트 모서리와 전계판 끝단에서의 전계가 균형을 이루면서 항복전압을 최대로 할 수 있는 최적의 $SiN_x$ 박막 두께는 200~300 nm 인 것으로 나타났다.