• Journal of Nuclear Fuel Cycle and Waste Technology(JNFCWT)
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• v.14 no.4
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• pp.435-443
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• 2016

This paper describes the development of a dry operation process for PWR spent nuclear fuel, which is currently stored in the domestic NPP's storage pool, using a dual purpose metal cask. Domestic NNPs have had experience with wet type transportation of PWR spent nuclear fuel between neighboring NPPs since the early 1990s, but no experience with dry type operation. For this reason, we developed a specific operation process and also confirmed the safety of the major cask components and its spent nuclear fuel during the dual purpose metal cask operation process. We also describe the short term operation process that was established to be completed within 21 hours and propose the allowable working time for each step (15 hours for wet process, 3 hours for drain process and 3 hours for vacuum drying process).

• Korean Journal of Materials Research
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• v.15 no.3
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• pp.183-188
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• 2005

It was studied in this article how the flexural strength of bare silicon chips is influenced by adopting dual wafer back-lapping process. The experimental results showed that an additional finishing process after the conventional grinding process improves the flexural strength of bare chips by more than 2-fold. In particular, this work showed that the proper removal of the grinding marks$(Ra=0.1\;{\mu}m)$existing on the wafer back-surface resulting from the grinding process significantly contiributes to the enhancement of chip strength.

• Journal of the Korean Statistical Society
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• v.27 no.2
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• pp.221-235
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• 1998

Suppose that an observed process can be written as the additive model of the signal process and the noise process with unknown parameters. In practice the signal process is not directly observed. We consider the problem of estimating parameter from the observation process using the quasi-likelihood method.

• 한국정보디스플레이학회:학술대회논문집
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• 2004.08a
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• pp.383-388
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• 2004

In this paper an alternative Active Matrix LCD technology is described with scalable, low cost processing. The Dual Select Diode AMLCD requires 60% lower capital investment in the array process than a-Si TFT arrays and results in 20% lower cost LCD modules. Development at several AMLCD manufacturers is in progress.

• Proceedings of the Korea Society for Energy Engineering kosee Conference
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• 2010.04a
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• pp.64-64
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• 2010

• 한국정보디스플레이학회:학술대회논문집
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• 2005.07b
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• pp.873-877
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• 2005

Recent developments in Dual Select Diode (DSD) AMLCD technology are described. They include a novel array design and drive method with shared select lines, which leads to higher aperture ratio and a further reduction of module cost. A Color-On-Array DSD process and pixel layout compatible with In-Plane-Switching is also proposed.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2009.10a
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• pp.231-232
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• 2009

• Journal of Korean Society for Quality Management
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• v.40 no.4
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• pp.481-496
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• 2012

Purpose: This paper aims at improving inefficiency of an existing posterior preference articulation method proposed for dual response surface optimization. The method generates a set of non-dominated solutions and then allows a decision maker (DM) to select the best solution among them through an interval selection strategy. Methods: This paper proposes an iterative posterior preference articulation method, which repeatedly generates the predetermined number of non-dominated solutions in an interval which becomes gradually narrower over rounds. Results: The existing method generates a good number of non-dominated solutions not used in the DM's selection process, while the proposed method generates the minimal number of non-dominated solutions necessitated in the selection process. Conclusion: The proposed method enables a satisfactory compromise solution to be achieved with minimal cognitive burden of the DM as well as with light computation load in generating non-dominated solutions.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.21 no.4
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• pp.296-299
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• 2008

The effects of radio frequency (RF) source power for decoupled plasma nitridation (DPN) process on the electrical properties and Fowler-Nordheim (FN) stress immunity of the oxynitride gate dielectrics for deep nano-technology devices has been investigated. With increase of RF source power, the threshold voltage (Vth) of a NMOS transistor(TR) decreased and that of a PMOS transistor increased, indicating that the increase of nitrogen incorporation in the oxynitride layer due to higher RF source power induced more positive fixed charges. The improved off-current characteristics and wafer uniformity of PMOS Vth were observed with higher RF source power. FN stress immunity, however, has been degenerated with increasing RF source power, which was attributed to the increased trap sites in the oxynitride layer. With the experimental results, we could optimize the DPN process minimizing the power consumption of a device and satisfying the gate oxide reliability.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.13 no.7
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• pp.633-640
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• 2002

In this paper, the small chip meander antenna for dual-frequency operation is presented. The proposed chip meander antennas was fabricated by the ceramic chip using LTCC-MLC process. It is a novel compact dual-frequency design using a meandered patch that achieves more degrees of freedom for adjusting dual-frequency operation and the size reduction with narrow frequency ratio. And it is proposed that the 3D structure for additional size reduction of the meander antenna. The size reduction of the 3D meander antenna is as large as 50 % as compared to the design for dual-frequency operation not using 3D structure. It is observed that the principle of dual-frequency operation through current distribution, return loss and radiation pattern.