• Journal of Sensor Science and Technology
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• v.11 no.5
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• pp.255-262
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• 2002

Human retina is able to detect the edge of an object effectively. We designed a CMOS vision chip by modeling cells of the retina as hardwares involved in edge detection. There are several fluctuation factors which affect characteristics of MOSFETs during CMOS fabrication process and this effect appears as output offset of the vision chip which is composed of pixel arrays and readout circuits. The vision chip detecting edge information from input image is used for input stage of other systems. Therefore, the output offset of a vision chip determine the efficiency of the entire performance of a system. In order to eliminate the offset at the output stage, we designed a vision chip by using CDS(Correlated Double Sampling) technique. Using standard CMOS process, it is possible to integrate with other circuits. Having reliable output characteristics, this chip can be used at the input stage for many applications, like targe tracking system, fingerprint recognition system, human-friendly robot system and etc.

• Journal of Sensor Science and Technology
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• v.17 no.1
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• pp.15-22
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• 2008

When designing image sensors including a CMOS vision chip for edge detection, resolution is a significant factor to evaluate the performance. It is hard to improve the resolution of a bio-inspired CMOS vision using a resistive network because the vision chip contains many circuits such as a resistive network and several signal processing circuits as well as photocircuits of general image sensors such as CMOS image sensor (CIS). Low resolution restricts the use of the application systems. In this paper, we improve the resolution through layout and circuit optimization. Furthermore, we have designed a printed circuit board using FPGA which controls the vision chip. The vision chip for edge detection has been designed and fabricated by using $0.35{\mu}m$ double-poly four-metal CMOS technology, and its output characteristics have been investigated.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.53 no.5
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• pp.286-292
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• 2004

In this study, an integrated microelectrode array was fabricated on glass slide using microfabrication technology. Probe DNAs consisting of mercaptohexyl moiety at their 5-end were spotted on the gold electrode using micropipette or DNA arrayer utilizing the affinity between gold and sulfur. Cyclic voltammetry in 5mM ferricyanide/ferrocyanide solution at 100 ㎷/s confirmed the immobilization of probe DNA on the gold electrodes. When several DNAs were detected electrochemically, there was a difference between target DNA and control DNA in the anodic peak current values. It was derived from specific binding of Hoechst 33258 to the double stranded DNA due to hybridization of target DNA. It suggested that this DNA chip could recognize the sequence specific genes. It suggested that multichannel electrochemical DNA microarray is useful to develop a portable device for clinical gene diagnostic System.

• Proceedings of the KIEE Conference
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• 2002.11c
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• pp.253-256
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• 2002

A programmable CMOS negative resistor has been designed and fabricated in a 0.5um double poly double metal technology. The proposed CMOS negative resistor consists of a positive feedback OTA and a bump circuit with Gaussian-like I-V curve. Measurements of the fabricated chip confirm that the proposed CMOS resistor shows various negative resistance according to control voltage.

• ETRI Journal
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• v.20 no.1
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• pp.37-45
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• 1998

Reduced surface field lateral double-diffused MOS transistor for the driving circuits of plasma display panel and field emission display in the 120V region have been integrated for the first time into a low-voltage $1.2{\mu}m$ analog CMOS process using p-type bulk silicon. This method of integration provides an excellent way of achieving both high power and low voltage functions on the same chip; it reduces the number of mask layers double-diffused MOS transistor with a drift length of $6.0{\mu}m$ and a breakdown voltage greater than 150V was self-isolated to the low voltage CMOS ICs. The measured specific on-resistance of the lateral double-diffused MOS in $4.8m{\Omega}{\cdot}cm^2$ at a gate voltage of 5V.

• Food Science and Biotechnology
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• v.16 no.6
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• pp.889-893
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• 2007

The demand of quality green banana chips is increasing in the world snacks market, therefore, the preparation of quality chips and their subsequent shelf life in packaging were evaluated in this study. Banana slices were fried in hot oil to the desired moisture content (2-3%) and oil content (40%) in chips at 3 different temperatures, and the impact of different pretreatments were compared by sensory assessment. A linear relationship between time and temperature was used to achieve the optimal processing conditions. Banana slices fried at the lower temperature of $145^{\circ}C$ took longer to reach the desired chip qualities, but gave the best results in terms of color and texture. Blanching was the most effective pre-treatment for retaining the light yellow color in finished chips. For extending the shelf life of chips, moisture proof packaging in double layer high density polyethylene was more effective than single layer low density polyethylene.

• Journal of IKEEE
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• v.1 no.1 s.1
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• pp.1-10
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• 1997

It is well-known that rectangular bulk-Si sensors prepared by etch or epi etch-stop micromachining technology are already in practical use today, but the conventional bulk-Si sensor shows some drawbacks such as large chip size and limited applications as silicon sensor device is to be miniaturized. We consider a circular-shape SOI(Silicon-On-Insulator) micro-cavity technology to facilitate multiple sensors on very small chip, to make device easier to package than conventional sensor like pressure sensor and to provide very high over-pressure capability. This paper demonstrates the cross-functional results for stress analyses(targeting $5{\mu}m$ deflection and 100MPa stress as maximum at various applicable pressure ranges), for finding permissible diaphragm dimension by output sensitivity, and piezoresistive sensor theory from two-type SOI structures where the double SOI structure shows the most feasible deflection and small stress at various ambient pressures. Those results can be compared with the ones of circular-shape bulk-Si based sensor$^{[17]}. The SOI micro-cavity formed the sensors is promising to integrate with calibration, gain stage and controller unit plus high current/high voltage CMOS drivers onto monolithic chip.

• Journal of the Microelectronics and Packaging Society
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• v.26 no.4
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• pp.101-105
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• 2019

The adhesion reliability of the epoxy molding compound (EMC) and the printed circuit board (PCB) interface is critical to the quality and lifetime of the chip package since the EMC protects PCB from the external environment during the manufacturing, storage, and shipping processes. It is necessary to measure adhesion energy accurately to ensure product reliability by optimizing the manufacturing process during the development phase. This research deals with the measurement of EMC/PCB interfacial adhesion energy of chip package that has warpage induced by the coefficient of thermal expansion (CTE) mismatch. The double cantilever beam (DCB) test was conducted to measure adhesion energy, and the spring back force of specimens with warpage was compensated to calculate adhesion energy since the DCB test requires flat substrates. The result was verified by comparing the adhesion energy of flat chip packages come from the same manufacturing process.

• Current Optics and Photonics
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• v.5 no.2
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• pp.147-154
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• 2021

Microfluidic chip technology is a research focus in biology, chemistry, and medicine, for example. However, microfluidic chips are rarely applied in imaging, especially in ghost imaging. Thus in this work we propose a ghost-imaging system, in which we deploy a novel microfluidic chip modulator (MCM) constructed of double-layer zigzag micro pipelines. While in traditional situations a spatial light modulator (SLM) and supporting computers are required, we can get rid of active modulation devices and computers with this proposed scheme. The corresponding simulation analysis verifies good feasibility of the scheme, which can ensure the quality of data transmission and achieve convenient, fast ghost imaging passively.

• Proceedings of the Korean Powder Metallurgy Institute Conference
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• 2006.09b
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• pp.877-878
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• 2006

The sintered parts are mainly used for automobile industry, and a part of air conditioners. In automobile industry, the application range of sintered parts is very broad and use for a driving and a lubricating system. And air conditioner uses them for compressor. Grinding of compressor and pump parts is very difficult these days, because these parts use High hardness materials and require high precision grinding. Tool life has to be extended to decrease production cost. We analyzed processing mechanism and developed new grinding wheels for Double Disk Grinding. And, we introduce new truing technology that improved tool-life and precision.