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http://dx.doi.org/10.5369/JSST.2008.17.1.015

Vision chip for edge detection with resolution improvement through simplification of unit-pixel circuit  

Sung, Dong-Kyu (Department of Electronics, Kyungpook National University)
Kong, Jae-Sung (Department of Electronics, Kyungpook National University)
Hyun, Hyo-Young (Department of Electronics, Kyungpook National University)
Shin, Jang-Kyoo (Department of Electronics, Kyungpook National University)
Publication Information
Journal of Sensor Science and Technology / v.17, no.1, 2008 , pp. 15-22 More about this Journal
Abstract
When designing image sensors including a CMOS vision chip for edge detection, resolution is a significant factor to evaluate the performance. It is hard to improve the resolution of a bio-inspired CMOS vision using a resistive network because the vision chip contains many circuits such as a resistive network and several signal processing circuits as well as photocircuits of general image sensors such as CMOS image sensor (CIS). Low resolution restricts the use of the application systems. In this paper, we improve the resolution through layout and circuit optimization. Furthermore, we have designed a printed circuit board using FPGA which controls the vision chip. The vision chip for edge detection has been designed and fabricated by using $0.35{\mu}m$ double-poly four-metal CMOS technology, and its output characteristics have been investigated.
Keywords
vision chip; edge detection; resolution; FPGA;
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Times Cited By KSCI : 3  (Citation Analysis)
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