• Journal of KIISE
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• v.43 no.5
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• pp.569-578
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• 2016

The PLC (Programmable Logic Controller) has been widely used for the development of digital control system of nuclear power plant. The PLC has high maintenance costs and increasing complexity, hence, FPGA (Field Programmable Gate Array) based digital control system has been considered as an alternative. However, the development of FPGA based digital control system is a challenge for PLC engineers because they are required to learn about new language to develop FPGA and knowledge and know-how acquired in the development of PLC is not transferable. In this study, we proposed and implemented an automatic translation tool for translation of FBD (Function Block Diagram), a programming language of PLC software, into VHDL (VHSIC Hardware Description Language). Automatically translating the FBD to VHDL using this tool allows PLC engineers to develop FPGA without any knowledge of the hardware description language.

• Archives of design research
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• v.18 no.2 s.60
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• pp.265-272
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• 2005

In Korean language, 'changeu'(originality) and 'changjo'(creativity) has been used as almost same meaning, because these have similar pronunciation. However, originality means idea and creativity means process. The former is based on intuition, and the latter is on both of logic and intuition. Intuition process is not perceived very well, but logic has very clear one. We can find the due for that creating something is not difficult too much anymore, because the process is identified. The creation process is a problem solving process and it has the design on its center. Designer study the problem solving process and learn how to solve the problem with many cases on its studio class. Then we can call them as a creator. The meaning of design that it is a styling is very usual in Korean public and even designers. However, it will be not valid anymore in the upcoming digital age, which reproduction is possible with a little restriction. Design should be back as an original methodology for creation with the designer's own capability such as conception, intermediation, and visualization.

• Journal of Korea Society of Industrial Information Systems
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• v.19 no.1
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• pp.61-67
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• 2014

Conventional synchronous circuits in low power required systems such as sensor systems cannot only satisfy the timing requirement of the low voltage digital systems, but also they may generate wrong outputs under the influence of PVT variations and aging effects. Therefore, in the reliable ultra-low power design, asynchronous circuits have recently been reconsidered as a solution for scaling issues. However, it is not easy to totally replace synchronous circuits with asynchronous circuits in the digital systems, so the interfacing between the synchronous and asynchronous circuits is indispensable for the digital systems. This paper presents a new design for interfacing between asynchronous circuits and synchronous circuits, and the interface circuits are applied to a $4{\times}4$ multiplier logic designed using 0.11um technology.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.6
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• pp.85-90
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• 2013

In this paper, 6bit SAR ADC tolerant to ionizing radiation is presented. Radiation tolerance is achieved by using the Dummy Gate Assisted (DGA) MOSFET which was proposed to suppress the leakage current induced by ionizing radiation and its comparing sample is designed with the conventional MOSFET. The designed ADC consists of binary capacitor DAC, dynamic latch comparator, and digital logic and was fabricated using a standard 0.35um CMOS process. Irradiation was performed by Co-60 gamma ray. After the irradiation, ADC designed with the conventional MOSFET did not operate properly. On the contrary, ADC designed with the DGA MOSFET showed a little parametric degradation of which DNL was increased from 0.7LSB to 2.0LSB and INL was increased from 1.8LSB to 3.2LSB. In spite of its parametric degradation, analog to digital conversion in the ADC with DGA MOSFET was found to be possible.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.8
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• pp.47-55
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• 2010

In this paper, a timing register architecture using demultiplexer and counter is proposed to reduce the area of the high resolution SAR type analog to digital converter. The area and digital power consumption of the conventional timing register based on the shift register is drastically increased, as the resolution is increased. On the other hand, the proposed architecture results in reduction of the area and the power consumption of the error correction logic of the SAR ADC. This chip is implemented with 0.18 um CMOS process. The area is reduced by 5.4 times and the digital power consumption is minimized compared with the conventional one. The 12 bits SAR ADC shows ENOB of 11 bits, power consumption of 2 mW, and conversion speed of 1 MSPS. The die area is $1 mm{\times}1mm$.

• Journal of the Institute of Convergence Signal Processing
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• v.5 no.2
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• pp.159-164
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• 2004

This paper proposes a new digital filter implementation which adopts an identical structure at both behavioral and logic level in top-down design. This methodology is based on the observation that multiplication is a form of convolution and carrying, and therefore multiplication is implemented with the same structure as that of a convolution in a recursive manner at the logic level. In order to demonstrate a recursive structure-based FIR digital filter, we select L-tap transposed and systolic FIR filters, and implement them to have a single structure. The proposed filter design becomes regular and modular because of the recursive adoption of a single structure for convolutions, and is very compact in that it needs only two 1-bit I/O ports in addition to significant improvement on hardware complexity without time penalty on the output sequence.

• The Journal of the Korea Contents Association
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• v.22 no.6
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• pp.135-144
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• 2022

This study explores that how the logic of network power in the existing digital content distribution structure works against local media. The limitless citation of local media content, in particular, is becoming more common in order to profit from network traffic while not giving appropriate remuneration for local media content. This study tried to demonstrate how network media dominance alienates local media material by using YouTube network analysis of TV Maile Shinmun. According to the research result, it was found that major news media tends to take profits from the local media interview by not properly indicating the source video, or reporting the core content of the local media interview, making it unnecessary to look for the original video source. Despite the viewpoint that the digital environment presents opportunities for local media, the current network logic would not benefit local media, which calls for the need that the digital content distribution strategy of local media develops a new order such as NFT, one of blockchain-based monetary system.h the help of information technology.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.12 no.5
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• pp.2291-2293
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• 2011

In this paper, the composes with digital position with a computer logical operation order with the signal processing method which is pliability and result of the logical operation which confronts in input signal from the outside input-output Channel leads and about the drive which the possibility to output at the outside is a research. This Decoder IC Multiplexer & De-multiplexer, position the function with from the digital signal circle where the imagination embodiments and BIT outputs of IC etc. are possible is possible in basic and usefully from the general industrial, could be used.

• 제어로봇시스템학회:학술대회논문집
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• 2005.06a
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• pp.1304-1308
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• 2005

This paper presents the case that the existing analog control systems were retrofitted with digital DCS(Distributed Control System)s for boiler unit in thermal power plant. Replacement of existing worn-out or obsolete analog control systems has been considered. Replacement of existing analog control systems with another analog control systems has lots of difficulties in maintaining the systems due to being out of stock. Due to those difficulties, existing analog control systems have been retrofitted with digital DCSs in many industrial sites. KEPRI(Korea Electric Power Research Institute) accomplished the project that retrofitted analog control systems with the developed DCSs for boiler unit in middle-scale coal-fired thermal power plant. The benefits of an upgrade to digital control include a increase of reliability due to system redundancy, ease of modifying the control logic and the parameters of function block, ease of maintenance due to available spare parts, improvement of information display, ease of modifying MMI(Man Machine Interface) displays, a increase in system availability, and improvement of control performance. This paper describes how to use the parameters of existing analog controllers, the implementation of digital PID controller, control system configuration for boiler unit in thermal power plant, some boiler control loops, control result during commissioning, and the comparison of boiler characteristic test data after retrofitting with the existing test data.

• The Transactions of the Korean Institute of Power Electronics
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• v.4 no.3
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• pp.285-293
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• 1999

In this paper, the novel digital frequency/phase controller, to control the invelter fed traveling wave type ultra-sonic m motor(USM) is proposed. This controller is used to control the drive frequency, phase difference and applied voltages of e each phase of the motor. Proposed digital controller has constructed with digital logic only, no more use digitallongleftarrowanalog h hybrid method of the conventional controller, in order to generate drive frequency and phase difference. Therefore, the c control system has become to velY simple structure. T\rvo types of controllers are designed, one is to control drive f frequency and phase difference, another has added voltage control function of each phase. Two full digital voltage/phase c controllers are implemented by using custom LSI and EPLD, the control pelformance and the simplicity ofthe proposed c controller is verified by expeJimental results.