• Transactions on Electrical and Electronic Materials
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• v.5 no.1
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• pp.19-23
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• 2004

A novel method of high speed, accurate circuit simulation in 3-dimensional (3-D) parallel-plate capacitors is investigated. The basic concept of the circuit simulation methods is partial element equivalent circuit model. The three test structures of 3-D parallel-plate capacitors are fabricated by using multi-layer low-temperature co-fired ceramic (LTCC) process and their S-parameters are measured between 50 MHz and 5 GHz. S-parameters are converted to Y-parameters, for comparing measured data with simulated data. The circuit model parameters of the each building block are optimized and extracted using HSPICE circuit simulator. This method is convenient and accurate so that circuit design applications can be easily manipulated.

• Journal of electromagnetic engineering and science
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• v.11 no.2
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• pp.122-127
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• 2011

A general analysis of an aperture-coupled vertically mounted strip antenna is presented to examine its circuit characteristics. Based on the present analysis, an equivalent circuit model is developed, and an analytic or semi-analytic evaluation of the related circuit element values is described. The effects of structure parameters on the antenna characteristics were studied with the developed equivalent circuit, and the design curves were obtained. To check the validity of the proposed analysis and design theory, two C-band antennas (5.0 GHz and 4.5 GHz) were designed and fabricated. Their computed characteristics, derived from the proposed network analysis, were compared with the measurement and simulation results. The error of the current model in predicting the operating center frequency was less than 0.50 %. In addition, the observed bandwidth was found to be comparable to the conventional microstrip antennas. All the results fully validated the efficiency and accuracy of the proposed analysis and network model.

• 제어로봇시스템학회:학술대회논문집
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• 1997.10a
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• pp.265-271
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• 1997

A bond graph modeling approach which is equivalent to a finite element method is formulated in the case of the piezoelectric thickness vibrator. This formulation suggests a new definition of the generalized displacements for a continuous system as well as the piezoelectric thickness vibrator. The newly defined coordinates are illustrated to be easily interpreted physically and easily used in analysis of the system performance. Compared to the Mason equivalent circuit model, the bond graph model offers the primary advantage of physical realizability. Compared to circuit models based on standard discrete electrical elements, the main advantage of the bond graph model is a greater physical accuracy because of the use of multiport energic elements. While results are presented here for the thickness vibrator, the modeling method presented is general in scope and can be applied to arbitrary physical systems.

• Transactions of the Korean Society of Mechanical Engineers B
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• v.29 no.4 s.235
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• pp.526-536
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• 2005

A heat dissipation modeling method of EEE parts, or semi-empirical heat dissipation method, is developed for thermal design and analysis an electronic equipment of geostationary satellite. The power consumption measurement value of each functional breadboard is used for the heat dissipation modeling method. For the purpose of conduction heat transfer modeling of EEE parts, surface heat model using very thin ignorable thermal plates is developed instead of conventional lumped capacity nodes. The thermal plates are projected to the printed circuit board and can be modeled and modified easily by numerically preprocessing programs according to design changes. These modeling methods are applied to the thermal design and analysis of CTU (Command and Telemetry Unit) and verified by thermal cycling and vacuum tests.

• The Transactions of the Korean Institute of Power Electronics
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• v.12 no.6
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• pp.491-499
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• 2007

The variation of a load characteristic in the motor drive is one of the most important consideration. Because the current flowing into the motor generally varies according to the load variation, it needs to design the motor drive circuit properly in accordance with the load variation. However, the load variation of the drum washing machine is irregular and large due to the water flow and reverse load torque. Therefore, to design the motor drive circuit considering this load pattern, simulation results shows the load pattern modeling of the drum washing machine based on the physical analysis in this paper.

• Proceedings of the KIPE Conference
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• 2003.07b
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• pp.913-916
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• 2003

In many cases, ac line EMI filters are designed by trial and error method. Thus, designing a filter is a time-consuming process. To overcome the problem, the newly analytical design procedure is proposed in this paper. Using the modeling circuit of each filter components, the filter design is carried out applicable to both common-mode (CM) and differential-mode (DM). These are verified through the experimental results.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.7
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• pp.11-19
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• 1998

A signal line potential variation due to the delta-I noise was physically investigated in CMOS integrated circuits. An equivalent circuit for the noise analysis was presented. The signal line was modeled as segmented RC-lumped circuits with the ground noise. Then the equivalent circuit was mathematically analyzed. Therebvy a new signal line potential variation model due to the switching mosie was developed. Th emodel was verified with 0.35.mu.m CMOS deivce model parameters. The model has an excellent agreement with HSPICE simulation. Thus the proposed model can be dirctly employed in the industry to design the high-performance integrted circuit design as well as integrated circuit package design.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2003.11a
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• pp.343-346
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• 2003

A new structure to design low pass filters (LPFs) is presented rho proposed structure has the etched shape of Quad-Spiral DGS(Defected Ground Structure) on microstrip transmission lines. By extracting the equivalent circuit elements of unit Quad-Spiral DGS, LPFs are designed easily. The equivalent circuit of Quad-Spiral DGS consists of a step impedance resonator and lumped elements. The proposed LPF provided steep rejection characteristics with 5-poles. Experimental results show excellent agreements with circuit simulation results in wide band and the validity of our circuit modeling for LPF design. The result shows another possibility of Quad Spiral DGS for microwave devices.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.67 no.6
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• pp.745-752
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• 2018

ICs(Integrated circuits) for nuclear power plant exposed to radiation environment occur malfunctions and data errors by the TID(Total ionizing dose) effects among radiation-damage phenomenons. In order to protect ICs from the TID effects, this paper proposes a radiation-hardening of the logic circuit(D-latch) which used for the data synchronization and the clock division in the ICs design. The radiation-hardening technology in the logic device(NAND) that constitutes the proposed RH(Radiation-hardened) D-latch is structurally more advantageous than the conventional technologies in that it keeps the device characteristics of the commercial process. Because of this, the unit cell based design of the RH logic device is possible, which makes it easier to design RH ICs, including digital logic circuits, and reduce the time and cost required in RH circuit design. In this paper, we design and modeling the structure of RH D-latch based on commercial $0.35{\mu}m$ CMOS process using Silvaco's TCAD 3D tool. As a result of verifying the radiation characteristics by applying the radiation-damage M&S (Modeling&Simulation) technique, we have confirmed the radiation-damage of the standard D-latch and the RH performance of the proposed D-latch by the TID effects.

• 한국전산유체공학회:학술대회논문집
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• 2005.04a
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• pp.91-95
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• 2005

A heat dissipation modeling method of EEE parts is developed for thermal design and analysis of an satellite electronic equipment. The power consumption measurement value of each functional breadboard is used for the heat dissipation modeling method. For the purpose of conduction heat transfer modeling of EEE parts, surface heat model using very thin ignorable thermal plates is developed instead of conventional lumped capacity nodes. The thermal plates are projected to the printed circuit board and can be modeled and modified easily by numerically preprocessing programs according to design changes. These modeling methods are applied to the thermal design and analysis of CTU and verified by thermal cycling and vacuum tests.