• Journal of IKEEE
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• v.18 no.3
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• pp.320-327
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• 2014

Recently, Importance of power management circuit technology is increased with the development of portable electric devices. This paper presents a high performance DC-DC buck converter for mobile applications. Especially, presented design have low ripple voltages and driving capability of large load current. A designed voltage mode 2-phase DC-DC converter is implemented in a $0.35{\mu}m$ CMOS process, and the overall size is $2.35{\times}2.35mm^2$. The peak efficiency is 91% with a 4MHz frequency and the maximum load current is 4A.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.48 no.12
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• pp.23-30
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• 2011

This paper presents a Single-Inductor Multiple-Output (SIMO) DC-DC Converter with a negative feedback selection circuit to improve a regulation property at light load and to generate independent multiple outputs. The conventional SIMO DC-DC converter with a fixed negative feedback circuit cannot regulate correctly at light load. The SIMO DC-DC converter with the proposed negative feedback selection circuit has been designed in 0.35um 2-poly 3-metal BCDMOS. This converter is dual output boost converter with the 1.5V input and 2.5V, 3.0V output. The power conversion efficiency varies from 59% at 10mA loads to 85% at 50mA loads.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.6
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• pp.16-24
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• 2009

In this paper, DC-DC buck converter with on-chip filter inductor and capacitor is presented. By operating at high switching frequency of 50MHz with stacked interleaved topology, we reduced inductor and capacitor sizes compared to previously published DC-DC buck converters. The proposed circuit is designed in a standard $0.5{\mu}m$ CMOS process, and chip area is $9mm^2$. This circuit operated at the input voltage of $3{\sim}5V$ range, the maximum load current of 250mA, and the maximum efficiency of 71%.

• 전자공학회논문지 IE
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• v.49 no.1
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• pp.18-23
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• 2012

In this paper, a potable device application for DC-DC converter was designed for voltage protection circuit. Voltage protection circuit to offer the under voltage lock out and over voltage protection consists of a comparator and bais circuits were implemented using. XFAB 1um CMOS process, SPICE simulations was confirmed through the characteristics. Simulation results, under voltage lock out input voltage is 4.8 V higher when the turn-on and, 4.2 V less when turn-off. When the input voltage is low voltage is applied can be used to prevent malfunction of the circuit. Over voltage protection is 3.8 V reference voltage when the output voltage caused by blocking circuit prevents device destruction can be used to improve the stability and reliability. The virtual control circuits of the DC-DC converter connected. According to the results of the abnormal voltage, voltage protection circuit behavior was confirmed. The proposed voltage protection circuit of the DC-DC converter cell is useful are considered.

• Journal of IKEEE
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• v.24 no.1
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• pp.319-325
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• 2020

In this paper, a discontinuous-conduction mode (DCM) DC-DC buck converter is presented for mobile device applications. The buck converter consists of compensator for stable operations, pulse-width modulation (PWM) logic, and power switches. In order to achieve small hardware form-factor, the number of off-chip components should be kept to be minimum, which can be realized with simple and efficient frequency compensation and digital soft start-up circuits. Burst-mode operation is included for preventing the efficiency from degrading under very light load condition. The DCM DC-DC buck converter is fabricated with 0.18-um BCDMOS process. Programmable output with external resistors is typically set to be 1.8V for the input voltage between 2.8 and 5.0V. With a switching frequency of 1MHz, measured maximum efficiency is 92.6% for a load current of 100mA.

• Proceedings of the KIPE Conference
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• 2012.07a
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• pp.369-370
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• 2012

본 논문은 380V DC 배전 시스템의 양방향 전력 흐름 제어와 전력 변환 효율 개선을 위한 고효율 절연형 양방향 AC-DC 컨버터를 제안한다. 제안하는 회로는 비절연형 양방향 AC-DC 정류기와 절연형 양방향 CLLC 공진형 컨버터로 구성된다. AC-DC 정류기의 전력 변환 효율 높이기 위해서 단극성 SPWM 방식을 이용하여 SiC 다이오드와 Anti-parallel 다이오드가 없는 IGBT와 MOSFET를 이용하여 전력 변환 효율을 증가 시켰다. 절연형 양방향 DC-DC 컨버터의 효율을 높이기 위해서 전 범위 ZVS 동작이 가능한 양방향 CLLC 공진형 컨버터를 이용하였다. 5kW 시제품을 통하여 제안하는 절연형 양방향 AC-DC 컨버터의 성능을 검증하였다.

• Proceedings of the KIPE Conference
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• 2017.07a
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• pp.377-378
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• 2017

대용량 전력변환기는 가청주파수에 해당하는 낮은 주파수 스위칭 동작으로 전력변환기 구동 시 리액터 소음에 의한 공해를 유발하고 있다. 이러한 리액터 소음공해 제거하기위해 대용량 전력변환기의 높은 주파수 전압을 리액터에 인가할 수 있는 새로운 DC/DC 컨버터 토포로지를 제안한다. 본 논문에서 제안된 토포로지는 다수의 스위치를 병렬로 연결하여 스위치 인터리브 방식에 의한 높은 등가 스위칭 동작 구현이 가능하다. 따라서 제안된 스위치 인터리브 방식은 대용량 전력변환기의 리액터 소음을 제거할 수 있을 뿐만 아니라 리액터용 용량을 저감하여 전력변환기의 에너지 밀도 증대와 단가 감수 측면에서 큰 장점을 갖고 있다.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.9
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• pp.1763-1770
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• 2016

This paper proposed hybrid converter to operate over a wide output load power. The switched-capacitor converter has a high efficiency at low load power and a low efficiency at high load power. On the contrary, the buck converter has a high efficiency at high load power and a low efficiency at low load power. The proposed hybrid converter has combination of the switched-capacitor converter and the buck converter. The switched-capacitor operates at low load power and buck converter operates at high load power, so that the hybrid converter is improved power efficiency at wide output load power. The hybrid converter was implemented with a $0.18{\mu}m$ CMOS process. The hybrid converter has a range of the load power between $50{\mu}W$and 100mW. The maximum power efficiencies are 93% and 77% at the buck converter and the switched-capacitor converter, respectively.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2014.10a
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• pp.565-568
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• 2014

This paper presents a 0.2V DC/DC boost converter with regulated output for thermoelectric energy harvesting. To use low voltages from a thermoelectric device, a start-up circuit consisting of native NMOS transistors and resistors boosts an internal VDD, and the boosted VDD is used to operate the internal control block. When the VDD reaches a predefined value, a detector circuit makes the start-up block turn off to minimize current consumption. The final boosted VSTO is achieved by alternately operating the sub-boost converter for VDD and the main boost converter for VSTO according to the comparator outputs. When the VSTO reaches 2.4V, a buck converter starts to operate to generate a stabilized output VOUT. Simulation results shows that the designed converter generates a regulated 1.8V output from an input voltage of 0.2V, and its maximum power efficiency is 60%. The chip designed using a $0.35{\mu}m$ CMOS process occupies $1.1mm{\times}1.0mm$ including pads.

• Journal of IKEEE
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• v.22 no.1
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• pp.174-179
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• 2018

In this paper, design of high-efficiency DC-DC converter is presented for low-power PMIC (power management integrated circuit). As PMIC technologies for IoT and wearable devices have been continuously improved, high-efficiency energy harvesting schemes should be essential. Since the supply voltage resulting from energy harvesting is low and widely variable, design techniques to achieve high efficiency over a wide input voltage range are required. To obtain a constant switching frequency for wide input voltage range, frequency compensation circuit using supply-voltage variation sensing circuit is included. In order to obtain high efficiency performance at very low-power condition, accurate burst-mode control circuit was adopted to control switching operations. In the proposed DC-DC buck converter, output voltage is set to be 0.9V at the input voltage of 0.95~3.3V and maximum measured efficiency is up to 78% for the load current of 180uA.