• Title/Summary/Keyword: DC prediction

Search Result 123, Processing Time 0.027 seconds

Predictive Coding Methods in DCT Domain for Image Data Compression (영상 압축 부호화를 위한 DCT영역에서의 예측 부호화 방법)

  • Lee, Sang-Hee;Kim, Jae-Kyoon
    • Journal of the Korean Institute of Telematics and Electronics S
    • /
    • v.35S no.8
    • /
    • pp.86-95
    • /
    • 1998
  • Intra-frame video compression, which cannot make use of temporal predictions, requires much higher bit rates compared with inter-frame schemes. In order to reduce bit rates, intra-frame predictive coding methods in DCT domain have been studied especially within the framework of the MPEG-4 video coding standard currently being developed. In this paper, we propose novel intra-frame predictive coding methods in DCT domain with the marginal complexity increase over the conventional methods . The proposed methods consist of a DC coefficient prediction method and two AC coefficient prediction methods. The proposed methods consist of a DC coefficient prediction method and two AC coefficient prediction methods. The proposed DC coefficient prediction method makes it possible to adaptively select the prediction directions without overhead bits, by comparing gradients of DC coefficients from neighboring blocks. As the AC coefficient prediction methods, first, we present an effective method which can improve the prediction directions of the MPEG-4 scheme by considering the DC coefficient of the current block to be coded. And, we present another effective method that decision on the prediction is carried out for each AC coefficient. Simulation results show that substantial bit savings can be achieved by the proposed methods.

  • PDF

Load Current Prediction Method for a DC-DC Converter in Plasma Display Panel

  • Chae, S.Y.;Hyun, B.C.;Kim, W.S.;Cho, B.H.
    • 한국정보디스플레이학회:학술대회논문집
    • /
    • 2007.08a
    • /
    • pp.609-612
    • /
    • 2007
  • This paper describes a new method to predict the load current of a dc-dc converter. The load current is calculated using the video information of the PDP. The output capacitance of the dc-dc converter can be reduced by utilizing the predicted load current, which results in a cost reduction of the power system in the PDP.

  • PDF

On DC-Side Impedance Frequency Characteristics Analysis and DC Voltage Ripple Prediction under Unbalanced Conditions for MMC-HVDC System Based on Maximum Modulation Index

  • Liu, Yiqi;Chen, Qichao;Li, Ningning;Xie, Bing;Wang, Jianze;Ji, Yanchao
    • Journal of Power Electronics
    • /
    • v.16 no.1
    • /
    • pp.319-328
    • /
    • 2016
  • In this study, we first briefly introduce the effect of circulating current control on the modulation signal of a modular multilevel converter (MMC). The maximum modulation index is also theoretically derived. According to the optimal modulation index analysis and the model in the continuous domain, different DC-side output impedance equivalent models of MMC with/without compensating component are derived. The DC-side impedance of MMC inverter station can be regarded as a series xR + yL + zC branch in both cases. The compensating component of the maximum modulation index is also related to the DC equivalent impedance with circulating current control. The frequency characteristic of impedance for MMC, which is observed from its DC side, is analyzed. Finally, this study investigates the prediction of the DC voltage ripple transfer between two-terminal MMC high-voltage direct current systems under unbalanced conditions. The rationality and accuracy of the impedance model are verified through MATLAB/Simulink simulations and experimental results.

Reliability Prediction of Hybrid DC-DC Converter for Spacecrafts (우주용 Hybrid DC-DC Converter 신뢰성 예측)

  • Kim, Ki-Tae;Kim, Dal-Suk;Park, Boo-Hee;Ahn, Jung-Jin;Kim, Jong-Man;Jang, Joong-Soon
    • Journal of Applied Reliability
    • /
    • v.10 no.3
    • /
    • pp.171-182
    • /
    • 2010
  • The reliability prediction analysis is a feedback tool that designer uses to provide insight into the component designs. This insight may indicate sensitive components within the design. This paper examines predicted failure rates for hybrid dc-dc converter for spacecraft using MIL-HDBK-217F prediction methodology. The results from part count/stress analysis represent priority components that affect the converter failures. The high priority components are analyzed to find out stress factor based on MIL-HDBK-217F. This information provides an opportunity for designer to improve the reliability of the product in development process.

Failure Prediction Monitoring of DC Electrolytic Capacitors in Half-bridge Boost Converter (단상 하프-브리지 부스트 컨버터에서 DC 전해 커패시터의 고장예측 모니터링)

  • Seo, Jang-Soo;Shon, Jin-Geun;Jeon, Hee-Jong
    • The Transactions of the Korean Institute of Electrical Engineers P
    • /
    • v.63 no.4
    • /
    • pp.345-350
    • /
    • 2014
  • DC electrolytic capacitor is widely used in the power converter including PWM inverter, switching power supply and PFC Boost converter system because of its large capacitance, small size and low cost. In this paper, basic characteristics of DC electrolytic capacitor vs. frequency is presented and the real-time estimation scheme of ESR and capacitance based on the bandpass filtering is adopted to the single phase boost converter of uninterruptible power supply to diagnose its split dc-link capacitors. The feasibility of this real-time failure prediction monitoring system is verified by the computer simulation of the 5[kW] singe phase PFC half-bridge boost converter.

Battery charge prediction of sailing yacht regeneration system using neural networks (신경망을 이용한 세일링 요트 리제너레이션 시스템의 배터리 충전 예측)

  • Lee, Tae-Hee;Hwang, Woo-Sung;Choi, Myung-Ryul
    • Journal of Digital Convergence
    • /
    • v.18 no.11
    • /
    • pp.241-246
    • /
    • 2020
  • In this paper, we propose a neural network model to converge the marine electric propulsion system and deep learning algorithm to predict the DC/DC converter output current in the electric propulsion regeneration system and to predict the battery charge during regeneration. In order to experiment with the proposed neural network, the input voltage and current of the PCM were measured and the data set was secured on the prototype PCM board. In addition, in order to improve the learning results in the insufficient data set, the scale of the data set was increased through data fitting and its learning was executed further. After learning, the difference between the data prediction result of the neural network model and the actual measurement data was compared. The proposed neural network model effectively showed the prediction of battery charge according to changes in input voltage and current. In addition, by predicting the characteristic change of the analog circuit constituting the DC/DC converter through a neural network, it is determined that the characteristics of the analog circuit should be considered when designing the regeneration system.

An Improvement On-Line Failure Diagnosis of DC Link Capacitor in PWM Power Converters (PWM 전력 컨버터에서 DC 링크 커패시터의 개선된 온라인 고장 진단)

  • Shon, Jin-Geun;Na, Chae-Dong
    • The Transactions of the Korean Institute of Electrical Engineers P
    • /
    • v.59 no.1
    • /
    • pp.40-46
    • /
    • 2010
  • DC link electrolytic capacitors are widely used in various PWM power converter system, such as adjustable speed driver(ASD) or DC/DC converter. Electrolytic capacitors, which is the most of the time affected by aging effect, plays a very important role for the power electronics system quality and reliability. This objective of this paper is to propose a improvement method to detect the rise of equivalent series resistor(ESR) in order to realize the online failure prediction of electrolytic capacitor for DC link of PWM power converter. The ESR detection scheme is based on the determination of the electrolytic capacitor AC losses calculated from voltage/current measurement using AC coupling. Therefore, the preposed online failure prediction method has the merits of easy ESR computation and circuit simplicity compare with BPF method. Simulation results show the veridity of the proposed on-line ESR estimation method.

On-line Failure Detection Method of DC Output Filter Capacitor in Power Converters (전력변환장치에서의 DC 출력 필터 커패시터의 온라인 고장 검출기법)

  • Shon, Jin-Geun
    • The Transactions of the Korean Institute of Electrical Engineers P
    • /
    • v.58 no.4
    • /
    • pp.483-489
    • /
    • 2009
  • Electrolytic capacitors are used in variety of equipments as smoothening element of the power converters because it has high capacitance for its size and low price. Electrolytic capacitors, which is most of the time affected by aging effect, plays a very important role for the power electronics system quality and reliability. Therefore it is important to estimate the parameter of an electrolytic capacitor to predict the failure. This objective of this paper is to propose a new method to detect the rise of equivalent series resistor(ESR) in order to realize the online failure prediction of electrolytic capacitor for DC output filter of power converter. The ESR of electrolytic capacitor estimated from RMS result of filtered waveform(BPF) of the ripple capacitor voltage/current. Therefore, the preposed online failure prediction method has the merits of easy ESR computation and circuit simplicity. Simulation and experimental results are shown to verify the performance of the proposed on-line method.

A Study on the Efficiency Prediction of Low-Voltage and High-Current dc-dc Converters Using GaN FET-based Synchronous Rectifier (GaN FET 기반 동기정류기를 적용한 저전압-대전류 DC-DC Converter 효율예측)

  • Jeong, Jea-Woong;Kim, Hyun-Bin;Kim, Jong-Soo;Kim, Nam-Joon
    • The Transactions of the Korean Institute of Power Electronics
    • /
    • v.22 no.4
    • /
    • pp.297-304
    • /
    • 2017
  • The purpose of this paper is to analyze losses because of switching devices and the secondary side circuit diodes of 500 W full bridge dc-dc converter by applying gallium nitride (GaN) field-effect transistor (FET), which is one of the wide band gap devices. For the detailed device analysis, we translate the specific resistance relation caused by the GaN FET material property into algebraic expression, and investigate the influence of the GaN FET structure and characteristic on efficiency and system specifications. In addition, we mathematically compare the diode rectifier circuit loss, which is a full bridge dc-dc converter secondary side circuit, with the synchronous rectifier circuit loss using silicon metal-oxide semiconductor (Si MOSFET) or GaN FET, which produce the full bridge dc-dc converter analytical value validity to derive the final efficiency and loss. We also design the heat sink based on the mathematically derived loss value, and suggest the heat sink size by purpose and the heat divergence degree through simulation.

An Efficient Architecture of Transform & Quantization Module in MPEG-4 Video Code (MPEG-4 영상코덱에서 DCTQ module의 효율적인 구조)

  • 서기범;윤동원
    • Journal of the Institute of Electronics Engineers of Korea SD
    • /
    • v.40 no.11
    • /
    • pp.29-36
    • /
    • 2003
  • In this paper, an efficient VLSI architecture for DCTQ module, which consists of 2D-DCT, quantization, AC/DC prediction block, scan conversion, inverse quantization and 2D-IDCT, is presented. The architecture of the module is designed to handle a macroblock data within 1064 cycles and suitable for MPEG-4 video codec handling 30 frame CIF image for both encoder and decoder simultaneously. Only single 1-D DCT/IDCT cores are used for the design instead of 2-D DCT/IDCT, respectively. 1-bit serial distributed arithmetic architecture is adopted for 1-D DCT/IDCT to reduce the hardware area in this architecture. To reduce the power consumption of DCTQ modu1e, we propose the method not to operate the DCTQ modu1e exploiting the SAE(sum of absolute error) value from motion estimation and cbp(coded block pattern). To reduce the AC/DC prediction memory size, the memory architecture and memory access method for AC/DC prediction block is proposed. As the result, the maximum utilization of hardware can be achieved, and power consumption can be minimized. The proposed design is operated on 27MHz clock. The experimental results show that the accuracy of DCT and IDCT meet the IEEE specification.