• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 1998.11a
• /
• pp.21-24
• /
• 1998

The properties of ZrN layer deposited by Sputtering system have been investigated in the application of diffusion barrier layer to copper. ZrN layer exhibited a excellent barrier property up to $700^{\circ}$ and higher resistivity. If an excess $O_2$is protected during the process of ZrN deposition, ZrN layer will be possible to use a diffusion barrier layer to copper.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2011.02a
• /
• pp.188-188
• /
• 2011

Recently, scaling down of ULSI (Ultra Large Scale Integration) circuit of CMOS (Complementary Meta Oxide Semiconductor) based electronic devices, the electronic devices, become much faster and smaller size that are promising property of semiconductor market. However, very narrow interconnect line width has some disadvantages. Deposition of conformal and thin barrier is not easy. And metallization process needs deposition of diffusion barrier and glue layer for EP/ELP deposition. Thus, there is not enough space for copper filling process. In order to get over these negative effects, simple process of copper metallization is important. In this study, Cu-V alloy layer was deposited using of DC/RF magnetron sputter deposition system. Cu-V alloy film was deposited on the plane SiO2/Si bi-layer substrate with smooth surface. Cu-V film's thickness was about 50 nm. Cu-V alloy film deposited at $150^{\circ}C$. XRD, AFM, Hall measurement system, and AES were used to analyze this work. For the barrier formation, annealing temperature was 300, 400, $500^{\circ}C$ (1 hour). Barrier thermal stability was tested by I-V(leakage current) and XRD analysis after 300, 500, $700^{\circ}C$ (12 hour) annealing. With this research, over $500^{\circ}C$ annealed barrier has large leakage current. However vanadium-based diffusion barrier annealed at $400^{\circ}C$ has good thermal stability. Therefore thermal stability of vanadium-based diffusion barrier is desirable for copper interconnection.

• Proceedings of the Materials Research Society of Korea Conference
• /
• 2011.05a
• /
• pp.41.2-41.2
• /
• 2011

Recently, scaling down of ULSI (Ultra Large Scale Integration) circuit of CMOS (Complementary Metal Oxide Semiconductor) based electronic devices become much faster speed and smaller size than ever before. However, very narrow interconnect line width causes some drawbacks. For example, deposition of conformal and thin barrier is not easy moreover metallization process needs deposition of diffusion barrier and glue layer. Therefore, there is not enough space for copper filling process. In order to overcome these negative effects, simple process of copper metallization is required. In this research, Cu-V thin alloy film was formed by using RF magnetron sputter deposition system. Cu-V alloy film was deposited on the plane $SiO_2$/Si bi-layer substrate with smooth and uniform surface. Cu-V film thickness was about 50 nm. Cu-V layer was deposited at RT, 100, 150, 200, and $250^{\circ}C$. XRD, AFM, Hall measurement system, and XPS were used to analyze Cu-V thin film. For the barrier formation, Cu-V film was annealed at 200, 300, 400, 500, and $600^{\circ}C$ (1 hour). As a result, V-based thin interlayer between Cu-V film and $SiO_2$ dielectric layer was formed by itself with annealing. Thin interlayer was confirmed by TEM (Transmission Electron Microscope) analysis. Barrier thermal stability was tested with I-V (for measuring leakage current) and XRD analysis after 300, 400, 500, 600, and $700^{\circ}C$ (12 hour) annealing. With this research, over $500^{\circ}C$ annealed barrier has large leakage current. However V-based diffusion barrier annealed at $400^{\circ}C$ has good thermal stability. Thus, thermal stability of vanadium-based thin interlayer as diffusion barrier is good for copper interconnection.

• Proceedings of the Korean Vacuum Society Conference
• /
• 2010.08a
• /
• pp.178-178
• /
• 2010

With the scaling down of ULSI(Ultra Large Scale Integration) circuit of CMOS(Complementary Metal Oxide Semiconductor)based electronic devices, the electronic devices become more faster and smaller size that are promising field of semiconductor market. However, very narrow line width has some disadvantages. For example, because of narrow line width, deposition of conformal and thin barrier is difficult. Besides, proportion of barrier width is large, thus resistance is high. Conventional PVD(Physical Vapor Deposition) thin films are not able to gain a good quality and conformal layer. Hence, in order to get over these side effects, deposition of thin layer used of ALD(Atomic Layer Deposition) is important factor. Furthermore, it is essential that copper atomic diffusion into dielectric layer such as silicon oxide and hafnium oxide. If copper line is not surrounded by diffusion barrier, it cause the leakage current and devices degradation. There are some possible methods for improving the these secondary effects. In this study, TaNx, is used of Tertiarybutylimido tris (ethylamethlamino) tantalum (TBITEMAT), was deposited on the 24nm sized trench silicon oxide/silicon bi-layer substrate with good step coverage and high quality film using plasma enhanced atomic layer deposition (PEALD). And then copper was deposited on TaNx barrier using same deposition method. The thickness of TaNx was 4~5 nm. TaNx film was deposited the condition of under $300^{\circ}C$ and copper deposition temperature was under $120^{\circ}C$, and feeding time of TaNx and copper were 5 seconds and 5 seconds, relatively. Purge time of TaNx and copper films were 10 seconds and 6 seconds, relatively. XRD, TEM, AFM, I-V measurement(for testing leakage current and stability) were used to analyze this work. With this work, thin barrier layer(4~5nm) with deposited PEALD has good step coverage and good thermal stability. So the barrier properties of PEALD TaNx film are desirable for copper interconnection.

• Proceedings of the Materials Research Society of Korea Conference
• /
• 1994.11a
• /
• pp.51-52
• /
• 1994

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.16 no.2
• /
• pp.97-101
• /
• 2003

New Pt/Ti and hi/Ti double-metal structures have been investigated for the application of a diffusion barrier between Cu and Si in deep submicron integrated circuits. Pt/Ti and Ni/Ti were deposited using E-beam evaporator at room temperature. The performance of Pt/Ti and Ni/Ti structures as diffusion barrier against Cu diffusion was examined by charge pumping method, gate leakage current, junction leakage current, and SIMS(secondary ion mass spectroscopy). These evaluation indicated that Pt/Ti(200${\AA}$/100${\AA}$) film is a good barrier against Cu diffusion up to 450$^{\circ}C$.

• Journal of Korean Vacuum Science & Technology
• /
• v.1 no.1
• /
• pp.30-37
• /
• 1997

Interactions of Cu films with Si substrates separated by thin layers of molybdenum and molybdenum nitride were investigated in the viewpoint of diffusion barrier to copper. the diffusion barrier behavior of the layers was studied as functions of deposition and annealing conditions by cross-sectional transmission electron microscopy and Nomarski microscopy. the layers deposited at $N_2$ gas ratios of 0.4 and 0.5 exhibited good diffusion barrier behaviors up to $700^{\circ}C$, mainly due to the phase transformation of molybdenum to $\gamma$-Mo$_2$N phase. The increase in the N gas ratio in deposition elevates the lower limit of barrier failure temperature. Futhermore, amorphous molybdenum nitride films deposited at 20$0^{\circ}C$ and 30$0^{\circ}C$ did not fail, while the crystalline $\gamma$-Mo$_2$N films deposited at 40$0^{\circ}C$ and 50$0^{\circ}C$ showed signs of interlayer interactions between Cu and Si after annealing at 75$0^{\circ}C$ for 30 minutes. Therefore, the amorphous nature of the molybdenum nitride layer enhanced its ability to reduce Cu diffusion and its stability as a diffusion barrier at elevated temperatures.

• Journal of Sensor Science and Technology
• /
• v.13 no.3
• /
• pp.195-198
• /
• 2004

For a diffusion barrier against copper, tantalum nitride films have been deposited on $SiO_{2}$ by atomic layer deposition (ALD), using PEMAT(Pentakis(ethylmethylamino)tantalum) and $NH_{3}$ as precursors, Ar as purging gas. The deposition rate of TaN at substrate temperature $250^{\circ}C$ was about $0.67{\AA}$ per one cycle. The stability of TaN films as a Cu diffsion barrier was tested by thermal annealing for 30 minutes in $N_{2}$ ambient and characterized through XRD, sheet resistance, and C-V measurement(Cu($1000{\AA}$)/TaN($50{\AA}$)/$SiO_{2}$($2000{\AA}$)/Si capacitor fabricated), which prove the TaN film maintains the barrier properties Cu below $400^{\circ}C$.

• Proceedings of the Materials Research Society of Korea Conference
• /
• 1999.05a
• /
• pp.98-98
• /
• 1999

• Journal of the Korean institute of surface engineering
• /
• v.47 no.4
• /
• pp.162-167
• /
• 2014

The primary purpose of this research is to investigate how much the complexing agent in electroless Cu electrolytes will affect adhesion strength between copper film and Ta diffusion barrier for Cu interconnect of semiconductor. The adhesion strength using rochelle's salt as complexing agent was higher than the case of using EDTA-4Na. Effect of complexing agent on adhesion strength and electrical resistivity was studied in crystal structural point of view.