• Title/Summary/Keyword: Copper Electroplating

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Relationship between Concentration of Alcian Blue and Mechanical Properties on High Current Density Copper Electroplating (고전류밀도 구리도금공정에서 알시안블루(Alcian Blue) 농도와 기계적 특성과의 상관관계)

  • Woo, Tae-Gyu
    • Korean Journal of Materials Research
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    • v.30 no.4
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    • pp.160-168
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    • 2020
  • The current density in copper electroplating is directly related with the productivity; then, to increase the productivity, an increase in current density is required. This study is based on an analysis of changes in surface characteristics and mechanical properties by applying the addition of Alcian Blue (AB, C56H68Cl4CuN16S4). The amount of Alcian Blue in the electrolytes is changed from 0 to 100 ppm. When Alcian Blue is added at 20 ppm, a seed layer is formed homogeneously on the surface at the initial stage of nucleation. However, crystals electroplated in electrolytes with more than 40 ppm of Alcian Blue are observed to have growth in the vertical direction on the surface and the shapes are like pyramids. This tendency of initial nucleation formation causes protrusions when the thickness of copper foil is 12 ㎛. Thereafter, a lot of extrusions are observed on the group of 100 ppm Alcian Blue. Tensile strength of groups with added Alcian Blue increased by more than 140% compare to no-addition group, but elongation is reduced. These results are due to the decrease of crystal size and changes of prior crystal growth plane from (111) and (200) to (220) due to Alcian Blue.

Thickness Control of Electroplating Layer for Copper Pillar Tin Bump (구리기둥범프 용 전해도금 층 제어)

  • Moon, Dae-Ho;Hong, Sang-Jeen;Park, Jong-Dae;Hwang, Jae-Ryong;Soh, Dea-Wha
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2011.10a
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    • pp.903-906
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    • 2011
  • The electroplating and electro-less plating methods have been applied for the high density chip interconnect of the Copper Pillar Tin Bump (CPTB) preparation. The CPTB was prepared, which had been electroplated about $100{\mu}m$ pitch of copper layer firstly, and then the Tin layer was deposited on the copper pillar surface to protect the oxidation of it. It was also very important to get uniform thickness of electroplated copper layer, though it was difficult and sensitive. In order to control the thickness distribution, it was examined that the current separating disk of Insulating Gate with a hole in the center was installed between electrodes. The current flows through the center hole of the Insulating Gate in the cylindrical electroplating bath and the other parts were blocked to protect current flowing. The main current flowed through the center hole of the Insulating Gate directly to the opposite electrode of wafer disk. As the results, it was verified that the copper layer was thick in the center part of wafer disk with distribution of thinner to the outer part toward edge.

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Preparation of CuS Counter Electrodes Using Electroplating for Quantum Dot-sensitized Solar Cells (전기 도금 공정을 활용한 양자점 감응 태양전지 CuS 상대 전극 제작)

  • SEUNG BEOM HA; IN-HEE CHOI;JAE-YUP KIM
    • Transactions of the Korean hydrogen and new energy society
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    • v.34 no.6
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    • pp.785-791
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    • 2023
  • Copper sulfide (CuxS) has been extensively utilized as a counter electrode (CE) material for quantum dot solar cells (QDSCs) due to its exceptional catalytic activity for polysulfide electrolytes. The typical fabrication method of Cu2S CEs based on brass substrate is dangerous, involving the use of a highly concentrated hydrochloric acid solution in a relatively high temperature. In contrast, electroplating presents a safer alternative by employing a less acidic solution at a room temperature. In addition, the electroplating method increases the probability of obtaining CEs of consistent quality compared to the brass method. In this study, the optimized electroplating cycle for CuS CEs in QDSCs has been studied for the highly efficient photovoltaic performances. The QDSCs, featuring electroplated CuS CEs, achieved an impressive efficiency of 7.18%, surpassing the conventional method employing brass CEs, which yielded an efficiency of 6.62%.

Formation and Properties of Electroplating Copper Pillar Tin Bump (구리기둥주석범프의 전해도금 형성과 특성)

  • Soh, Dea-Wha
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.16 no.4
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    • pp.759-764
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    • 2012
  • Copper Pillar Tin Bump (CPTB) was investigated for high density chip interconnect technology development, which was prepared by electroplating and electro-less plating methods. Copper pillar tin bumps that have $100{\mu}m$ pitch were introduced with fabrication process using a KM-1250 dry film photoresist (DFR), with copper electroplating for Copper Pillar Bump (CPB) formation firstly, and then tin electro-less plating on it for control oxidation. Electric resistivity and mechanical shear strength measurements were introduced to characterize the oxidation effects and bonding process as a function of thermo-compression. Electrical resistivity increased with increasing oxidation thickness, and shear strength had maximum value with $330^{\circ}C$ and 500 N at thermo-compression process. Through the simulation work, it was proved that the CPTB decreased in its size of conduction area as time passes, however it was largely affected by the copper oxidation.

Formation and Properties of Electroplating Copper Pillar Tin Bump on Semiconductor Process (반도체공정에서 구리기둥주석범프의 전해도금 형성과 특성)

  • Wang, Li;Jung, One-Chul;Cho, Il-Hwan;Hong, Sang-Jeen;Hwang, Jae-Ryong;Soh, Dea-Wha
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2010.10a
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    • pp.726-729
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    • 2010
  • Copper Pillar Tin Bump (CPTB) was investigated for high density chip interconnect technology development, which was prepared by electroplating and electro-less plating methods. Copper pillar tin bumps that have $100{\mu}m$ pitch were introduced with fabrication process using a KM-1250 dry film photoresist (DFR), with copper electroplating for Copper Pillar Bump (CPB) formation firstly, and then tin electro-less plating on it for control oxidation. Electric resistivity and mechanical shear strength measurements were introduced to characterize the oxidation effects and bonding process as a function of thermo-compression. Electrical resistivity increased with increasing oxidation thickness, and shear strength had maximum value with $330^{\circ}C$ and 500 N thermo-compression process. Through the simulation work, it was proved that when the CPTB decreased in its size, it was largely affected by the copper oxidation.

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Influence of Incorporated Impurities on the Evolution of Microstructure in Electro-Deposited Copper Layer (혼입불순물이 구리 도금층의 미세조직변화에 미치는 영향)

  • Koo, Seok-Bon;Jeon, Jun-Mi;Lee, Chang-Myeon;Hur, Jin-Young;Lee, Hong-Kee
    • Journal of the Korean institute of surface engineering
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    • v.51 no.4
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    • pp.191-196
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    • 2018
  • The self-annealing which leads evolution of microstructure in copper electroplating layers at room temperature occurs after forming deposition layer. During the process, crystal orientation, size and sheet resistance of plating layer change. Lastly, it causes the change of physical and mechanical characteristics such as a tensile strength of plating layer. In this study, the variation of incorporated impurities, microstructure and sheet resistance of copper plating layer formed by electroplating are measured with and without inorganic additives during the self-annealing. In case of absence of inorganic additives, the copper layer presents strong total intensity of incorporated impurities. During the self-annealing, such width of reduction was significant. Moreover, microstructure and crystal size are increased while the tensile strength is decreased noticeably. On the other hand, in the presence of inorganic additives, there is no observable distinction in the copper plating layer. According to the observation on movements of the incorporated impurities in electrodeposition copper layer, within 12 hours the impurities are continuously shifted from inside of the plating layer to its surface after as-deposited electroplating. Within 24 hours, except for the small portion of surface layer, it is considered that most of the microstructure is transformed.

Electroplating of Copper Using Pulse-Reverse Electroplating Method for SiP Via Filling (펄스-역펄스 전착법을 이용한 SiP용 via의 구리 충진에 관한 연구)

  • Bae J. S.;Chang G H.;Lee J. H.
    • Journal of the Microelectronics and Packaging Society
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    • v.12 no.2 s.35
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    • pp.129-134
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    • 2005
  • Electroplating copper is the important role in formation of 3D stacking interconnection in SiP (System in Package). The I-V characteristics curves are investigated at different electrolyte conditions. Inhibitor and accelerator are used simultaneously to investigate the effects of additives. Three different sizes of via are tested. All via were prepared with RIE (reactive ion etching) method. Via's diameter are 50, 75, $100{\mu}m$ and the height is $100{\mu}m$. Inside via, Ta was deposited for diffusion barrier and Cu was deposited fer seed layer using magnetron sputtering method. DC, pulse and pulse revere current are used in this study. With DC, via cannot be filled without defects. Pulse plating can improve the filling patterns however it cannot completely filled copper without defects. Via was filled completely without defects using pulse-reverse electroplating method.

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Separation of Heavy Metals from Electroplating Waste Water by Solvent Extraction (용매추출법에 의한 광금폐수중 중금속의 분리에 관한 연구)

  • KIM Sung Gyu;LEE Hwa Yeung;OH Jong Kee
    • Resources Recycling
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    • v.12 no.1
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    • pp.25-32
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    • 2003
  • A study on the separation of heavy metals such as iron, copper, zinc and nickel from electroplating waste water has been investigated. The results showed that the PC-88A was more effective extractant for the extraction of zinc and the efficiency of zinc was to be about 100% at pH 2.5. And copper and nickel were extracted about 100% at pH 2 and more than 90% at pH 4~5 with LIX 84, respectively. On the other hand, in the case of solvent extraction of electroplating waste water(Acid-Alkali type) containing heavy metals, the ferric ion was first extracted at pH 2∼2.5 with 20% Naphthenic acid or 10% Versatic acid-10. And then, copper and zinc were extracted at pH 2 with 3% LIX 84 and at pH 2.5∼3 with 20% PC-88A respectively, remaining nickel in the raffinate. In this manner, the heavy metals in electroplating waste water could be effectively separated with solvent extraction method.

Effect of Additives on the Hardness of Copper Electrodeposits in Acidic Sulfate Electrolyte (황산구리 전착에서의 첨가제가 구리전착층의 경도에 미치는 영향)

  • Min, Sung-Ki;Lee, Jeong-Ja;Hwang, Woon-Suk
    • Corrosion Science and Technology
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    • v.10 no.4
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    • pp.143-150
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    • 2011
  • Copper electroplating has been applied to various fields such as decorative plating and through-hole plating. Technical realization of high strength copper preplating for wear-resistant tools and molds in addition to these applications is the aim of this work. Brighters and levelers, such as MPSA, Gelatin, Thiourea, PEG and JGB, were added in copper sulfate electrolyte, and the effects of these organic additives on the hardness were evaluated. All additives in this work were effective in increasing the hardness of copper electrodeposits. Thiourea increased the hardness up to 350 VHN, and was the most effective accelarator in sulfate electrolyte. It was shown from the X-ray diffraction analysis that preferred orientation changed from (200) to (111) with increasing concentration of organic additives. Crystallite size decreased with increasing concentration of additive. Hardness was increased with decreasing crystallite size, and this result is consistent with Hall-Petch relationship, and it was apparent that the hardening of copper electrodeposits results from the grain refining effect.

The Effects of Current Types on Through Via Hole Filling for 3D-SiP Application (전류인가 방법이 3D-SiP용 Through Via Hole의 Filling에 미치는 영향)

  • Chang, Gun-Ho;Lee, Jae-Ho
    • Journal of the Microelectronics and Packaging Society
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    • v.13 no.4
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    • pp.45-50
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    • 2006
  • Copper via filling is the important factor in 3-D stacking interconnection of SiP (system in package). As the packaging density is getting higher, the size of via is getting smaller. When DC electroplating is applied, a defect-free hole cannot be obtained in a small size via hole. To prevent the defects in holes, pulse and pulse reverse current was applied in copper via filling. The holes, $20\and\;50{\mu}m$ in diameter and $100{\sim}190\;{\mu}m$ in height. The holes were prepared by DRIE method. Ta was sputtered for copper diffusion barrier followed by copper seed layer IMP sputtering. Via specimen were filled by DC, pulse and pulse-reverse current electroplating methods. The effects of additives and current types on copper deposits were investigated. Vertical and horizontal cross section of via were observed by SEM to find the defects in via. When pulse-reverse electroplating method was used, defect free via were successfully obtained.

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