• Journal of the Korean Ceramic Society
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• v.36 no.6
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• pp.604-610
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• 1999

Silicide layer structures and morphology degradation of the surface and interface of the silicide layers for he Co/refractory metal bilayer sputter-deposited on the P-doped polycrystalline Si substrate and subjected to rapid thermal annealing were investigated and compared with those on the single Si substrate. The CoSi-CoSi2 phase transition temperature is lower an morphology degradation of the silcide layer occurs more severely for the Co/refractorymetal bilayer on the P-doped polycrystalline Si substrate than on the single Si substrate. Also the final layer structure and the morphology of the films after silicidation annealing was found to depend strongly upon the interlayer metal. The layer structure after silicidation annealing of Co/Hf/doped-poly Si is Co-Hf alloy/polycrystalline CoSi2/poly Si substrate while that of Co/Nb is polycrystalline CoSi2/NbSi2/polycrystalline CoSi2/poly Si.

• Journal of the Korean Ceramic Society
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• v.33 no.9
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• pp.1012-1018
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• 1996

To investigate the final structures and reactions of silicides a somewhat thick Ti monolayer Co monolayer and Co/Ti bilayer films were deposited on single Si(100) wafer by electron beam evaporation followed by heat treatment using RTA system in N2 ambient. TiO2 film formed between Ti and TiSi2 layers due to oxgen or moisture in the Ti monolayer sample. The final layer structure obtained after the silicidation heat-treatment of the Co/Ti bilayer sample turned out to be TiSi2/CoSi2/Ti-Co-Si alloy/CoSi2/Si sbustrate. This implies that imperfect layer inversion occurred due to the formation of Ti-Co-Si intermediate phase.

• Journal of the Korean Ceramic Society
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• v.38 no.10
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• pp.871-875
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• 2001

Cobalt silicidation at sidewall spacer edge of Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) with post annealing treatment for capacitor forming process has been investigated as a function of dopant species. Cobalt silicidation of nMOSFET with n-type Lightly Doped Drain (LDD) and pMOSFET with p-type LDD produces a well-developed cobalt silicide with its lateral growth underneath the sidewall spacer. In case of pMOSFET with n-type LDD, however, a void is formed at the sidewall spacer edge with no lateral growth of cobalt silicide. The void formation seems to be due to a retarded silicidation process at the LDD region during the first Rapid Thermal Annealing (RTA) for the reaction of Co with Si, resulting in cobalt mono silicide at the LDD region. The subsequent second RTA converts the cobalt monosilicide into cobalt disilicide with the consumption of Si atoms from the Si substrate, producing the void at the sidewall spacer edge in the Si region. The void formed at the sidewall spacer edge serves as a resistance in the current-voltage characteristics of the pMOSFET device.

• Korean Journal of Materials Research
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• v.10 no.4
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• pp.301-304
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• 2000

A new triode type Co-silicided Si FEA(field emitter array) was realized by Co-silicidation of Co coated Si FEA and its field emission properties were investigated. The field emission properties of the fabricated device through the unit pixel with $45{\times}45$ tip array in the area of $250{\mu\textrm{m}}{\times}250{\mu\textrm{m}}$ under high vacuum condition of $10^{-8}Torr$ were as follows : the turn-on voltage was about 35V and the anode current was about $1.2\mu\textrm{A}(0.6㎁/tip)$ at the bias of $V_A=500V\;and\; V_G=55V$. The fabricated device showed the stable electrical characteristics without degradation of field emission current for the long term operation except for the initial transient state. The low turn-on voltage and the high current stability of the Co-silicided Si FEA were due to the thermal and chemical stability and the low work function of silicide layer formed at the surface of Si tip.

• Proceedings of the Materials Research Society of Korea Conference
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• 1995.11a
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• pp.8-8
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• 1995

• Proceedings of the Materials Research Society of Korea Conference
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• 1997.05a
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• pp.12-12
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• 1997

• Korean Journal of Materials Research
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• v.8 no.3
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• pp.189-194
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• 1998

The redistribution behavior of boron during Co silicidation annealing in the Co/metal/Si system was investigated using SIMS. Ti, Nb and Hf films were used as epitaxy promoting metal layers. After annealing treatment the boron peak height was about 1 order lowered in Co/Ti/Si and Co/Nb/Si systems but the relative peak position from the surface did not change. The distribution of boron was very similar to those of Ti and Nb, because of the strong affinities of boron with them. Also, the position of the main boron peak in the Co/Hf/Si system was almost the same as that of Hf, but the distribution feature of the Co/Hf/Si system somewhat differed from those of Co/Ti/Si and Co/Nb/Si systems. This implies that the affinity between B and Hf is weaker than those of B-Ti and B-Nb. Boron tends to be depleted at the silicidelsi interface while it tends to be piled-up at the Co-metal/Co silicide interface during silicidation annealing.

• Proceedings of the Materials Research Society of Korea Conference
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• 2002.11a
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• pp.108-108
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• 2002

• Korean Journal of Materials Research
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• v.8 no.7
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• pp.579-583
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• 1998

Silicide layer structures, agglomeration of silicide layers, and dopant redistributions for the Co/Ti bilayer sputter-deposited on the P-doped polycrystalline Si substrate and subjected to rapid thermal annealing were investigated and compared with those on the single Si substrate. The $CoSi_2$ phase transition temperature is higher and agglomeration of the silicide layer occurs more severely for the Co/Ti bilayer on the doped polycrystalline Si substrate than on the single Si substrate. Also, dopant loss by outdiffusion is much more significant on the doped polycrystalline Si substrate than on the single Si substrate. All of these differences are attributed to the grain boundary diffusion and heavier doping concentration in the polycrystalline Si. The layer structure after silicidation annealing of Co/ Tildoped - polycrystalline Si is polycrystalline CoSi,/polycrystalline Si, while that of Co/TiI( 100) Si is Co- Ti- Si/epi- CoSi,/(lOO) Si.

• Korean Journal of Materials Research
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• v.16 no.9
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• pp.564-570
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• 2006

Silicides have been required to be below 40 nm-thick and to have low contact resistance without agglomeration at high silicidation temperature. We fabricated composite silicide layers on the wafers from Ni(20 nm)/Co(20 nm)/poly-Si(70 nm) structure by rapid thermal annealing of $700{\sim}1100^{\circ}C$ for 40 seconds. The sheet resistance, surface composition, cross-sectional microstructure, and surface roughness were investigated by a four point probe, a X-ray diffractometer, an Auger electron spectroscopy, a field emission scanning electron microscope, and a scanning probe microscope, respectively. The sheet resistance increased abruptly while thickness decreased as silicidation temperature increased. We propose that the fast metal diffusion along the silicon grain boundary lead to the poly silicon mixing and inversion. Our results imply that we may consider the serious thermal instability in designing and process for the sub-0.1 um CMOS devices.